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Sun, 05 Jul 2026 12:14:20 -0700 (PDT) From: Anna Maniscalco Date: Sun, 05 Jul 2026 21:13:38 +0200 Subject: [PATCH RFC 04/13] arm64: dts: qcom: sm8650: move smmu sid 1 to new lpac device Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260705-descriptive-name-lpac-upstream-v1-4-01d50c3e0c99@gmail.com> References: <20260705-descriptive-name-lpac-upstream-v1-0-01d50c3e0c99@gmail.com> In-Reply-To: <20260705-descriptive-name-lpac-upstream-v1-0-01d50c3e0c99@gmail.com> To: Rob Clark , Will Deacon , Robin Murphy , Joerg Roedel , Sean Paul , Konrad Dybcio , Akhil P Oommen , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: iommu@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, Anna Maniscalco X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1783278851; l=1315; i=anna.maniscalco2000@gmail.com; s=20240815; h=from:subject:message-id; bh=W9JuocKrQv+AohpUo+PmkcNR8I1xfDAl+4Cp7RFtojI=; b=kEwYPS/vxpnj4j1Y93tuTQI1VkpzxodgIkiDcPohzvaSRPC/w1pcsAEP4JHxHA84titeQ5f9H M3dIrUAZLjTC7VIAtRzh7eh4qQ+kjl3T5Nk55cOzsLMoPsgmplJk+HF X-Developer-Key: i=anna.maniscalco2000@gmail.com; a=ed25519; pk=0zicFb38tVla+iHRo4kWpOMsmtUrpGBEa7LkFF81lyY= Previously both SID 0 and 1 where associated with the same domain. When LPAC is not used this is needed so firmware can acces memory when initializing using the same page table as GFX. To use LPAC however we need to move SID 1 to a different device. Signed-off-by: Anna Maniscalco --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 1604bc8cff37..44e5f9d4b335 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -4133,6 +4133,13 @@ tcsr: clock-controller@1fc0000 { #reset-cells = <1>; }; + lpac: lpac@3d00000 { + compatible = "qcom,lpac"; + reg = <0x0 0x03d00000 0x0 0x61000>; + + iommus = <&adreno_smmu 1 0x0>; + }; + gpu: gpu@3d00000 { compatible = "qcom,adreno-43051401", "qcom,adreno"; reg = <0x0 0x03d00000 0x0 0x40000>, @@ -4144,8 +4151,9 @@ gpu: gpu@3d00000 { interrupts = ; - iommus = <&adreno_smmu 0 0x0>, - <&adreno_smmu 1 0x0>; + iommus = <&adreno_smmu 0 0x0>; + + qcom,lpac= <&lpac>; operating-points-v2 = <&gpu_opp_table>; -- 2.54.0