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Sun, 05 Jul 2026 12:14:25 -0700 (PDT) From: Anna Maniscalco Date: Sun, 05 Jul 2026 21:13:40 +0200 Subject: [PATCH RFC 06/13] DEBUGGING: print contextbank and other ttbrs on fault Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260705-descriptive-name-lpac-upstream-v1-6-01d50c3e0c99@gmail.com> References: <20260705-descriptive-name-lpac-upstream-v1-0-01d50c3e0c99@gmail.com> In-Reply-To: <20260705-descriptive-name-lpac-upstream-v1-0-01d50c3e0c99@gmail.com> To: Rob Clark , Will Deacon , Robin Murphy , Joerg Roedel , Sean Paul , Konrad Dybcio , Akhil P Oommen , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: iommu@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, Anna Maniscalco X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1783278851; l=2450; i=anna.maniscalco2000@gmail.com; s=20240815; h=from:subject:message-id; bh=U1AI7O1BhdkrzXxItW/0XejZckUMlwC4IaAuS4BWmNY=; b=M+uiiUBR/lmMuad/SAHrKO891VirOTvBs28b6xreWN52s/uXJnTXUgzkAI4/P/yddSN2TXP4j AH+AF+T02UICCWBKtKMyVk6fvecJCMlYT6OCGtiT5he3yQ4MXqiVKBI X-Developer-Key: i=anna.maniscalco2000@gmail.com; a=ed25519; pk=0zicFb38tVla+iHRo4kWpOMsmtUrpGBEa7LkFF81lyY= Faults can now come from different context banks so print that information as well. Signed-off-by: Anna Maniscalco --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 4 ++-- drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 4 ++++ include/linux/adreno-smmu-priv.h | 2 ++ 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index be374cf209f4..6a48e211fa3c 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -329,8 +329,8 @@ int adreno_fault_handler(struct msm_gpu *gpu, unsigned long iova, int flags, else if (info->fsr & ARM_SMMU_FSR_EF) type = "EXTERNAL"; - pr_warn_ratelimited("*** gpu fault: ttbr0=%.16llx iova=%.16lx dir=%s type=%s source=%s (%u,%u,%u,%u)\n", - info->ttbr0, iova, + pr_warn_ratelimited("*** gpu fault: cb=%d ttbr0=%.16llx cb0_ttbr0=%.16llx cb1_ttbr0=%.16llx iova=%.16lx dir=%s type=%s source=%s (%u,%u,%u,%u)\n", + info->contextbank, info->ttbr0, info->cb0_ttbr0, info->cb1_ttbr0, iova, flags & IOMMU_FAULT_WRITE ? "WRITE" : "READ", type, block, scratch[0], scratch[1], scratch[2], scratch[3]); diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 48a590aaeb5e..ae6152bddf8f 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -136,6 +136,10 @@ static void qcom_adreno_smmu_get_fault_info(const void *cookie, info->cbfrsynra = arm_smmu_gr1_read(smmu, ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); info->ttbr0 = arm_smmu_cb_readq(smmu, cfg->cbndx, ARM_SMMU_CB_TTBR0); info->contextidr = arm_smmu_cb_read(smmu, cfg->cbndx, ARM_SMMU_CB_CONTEXTIDR); + info->contextbank = cfg->cbndx; + + info->cb0_ttbr0 = arm_smmu_cb_readq(smmu, 0, ARM_SMMU_CB_TTBR0); + info->cb1_ttbr0 = arm_smmu_cb_readq(smmu, 1, ARM_SMMU_CB_TTBR0); } static void qcom_adreno_smmu_set_stall(const void *cookie, bool enabled) diff --git a/include/linux/adreno-smmu-priv.h b/include/linux/adreno-smmu-priv.h index d83c9175828f..5d6de4b4de06 100644 --- a/include/linux/adreno-smmu-priv.h +++ b/include/linux/adreno-smmu-priv.h @@ -32,6 +32,8 @@ struct adreno_smmu_fault_info { u32 fsynr0; u32 fsynr1; u32 cbfrsynra; + u32 contextbank; + u64 cb0_ttbr0, cb1_ttbr0; }; /** -- 2.54.0