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Mon, 06 Jul 2026 02:32:36 -0700 (PDT) From: Jerome Brunet Date: Mon, 06 Jul 2026 11:32:13 +0200 Subject: [PATCH v4 5/9] clk: sunxi-ng: sun6i-rtc: Add feature bit for IOSC calibration Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260706-a733-rtc-v4-5-f330728db3d3@baylibre.com> References: <20260706-a733-rtc-v4-0-f330728db3d3@baylibre.com> In-Reply-To: <20260706-a733-rtc-v4-0-f330728db3d3@baylibre.com> To: Junhui Liu , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Jerome Brunet X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 From: Junhui Liu The sun6i-rtc CCU driver currently uses a global static variable to denote whether calibration is supported, which makes IOSC operations tightly coupled to this file. Convert this into a feature bit to decouple the logic. This allows the IOSC clock code to be moved into a shared module for reuse by other SoCs. Signed-off-by: Junhui Liu Reviewed-by: Chen-Yu Tsai Signed-off-by: Jerome Brunet --- drivers/clk/sunxi-ng/ccu-sun6i-rtc.c | 17 +++++++++-------- drivers/clk/sunxi-ng/ccu_common.h | 1 + 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c b/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c index 0f528bfaed00..b24c8b196e66 100644 --- a/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c +++ b/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c @@ -52,8 +52,6 @@ struct sun6i_rtc_match_data { u8 osc32k_fanout_nparents; }; -static bool have_iosc_calibration; - static int ccu_iosc_enable(struct clk_hw *hw) { struct ccu_common *cm = hw_to_ccu_common(hw); @@ -80,7 +78,7 @@ static unsigned long ccu_iosc_recalc_rate(struct clk_hw *hw, { struct ccu_common *cm = hw_to_ccu_common(hw); - if (have_iosc_calibration) { + if (cm->features & CCU_FEATURE_IOSC_CALIBRATION) { u32 reg = readl(cm->base + IOSC_CLK_CALI_REG); /* @@ -119,7 +117,7 @@ static int ccu_iosc_32k_prepare(struct clk_hw *hw) struct ccu_common *cm = hw_to_ccu_common(hw); u32 val; - if (!have_iosc_calibration) + if (!(cm->features & CCU_FEATURE_IOSC_CALIBRATION)) return 0; val = readl(cm->base + IOSC_CLK_CALI_REG); @@ -134,7 +132,7 @@ static void ccu_iosc_32k_unprepare(struct clk_hw *hw) struct ccu_common *cm = hw_to_ccu_common(hw); u32 val; - if (!have_iosc_calibration) + if (!(cm->features & CCU_FEATURE_IOSC_CALIBRATION)) return; val = readl(cm->base + IOSC_CLK_CALI_REG); @@ -148,7 +146,7 @@ static unsigned long ccu_iosc_32k_recalc_rate(struct clk_hw *hw, struct ccu_common *cm = hw_to_ccu_common(hw); u32 val; - if (have_iosc_calibration) { + if (cm->features & CCU_FEATURE_IOSC_CALIBRATION) { val = readl(cm->base + IOSC_CLK_CALI_REG); /* Assume the calibrated 32k clock is accurate. */ @@ -167,7 +165,7 @@ static unsigned long ccu_iosc_32k_recalc_accuracy(struct clk_hw *hw, struct ccu_common *cm = hw_to_ccu_common(hw); u32 val; - if (have_iosc_calibration) { + if (cm->features & CCU_FEATURE_IOSC_CALIBRATION) { val = readl(cm->base + IOSC_CLK_CALI_REG); /* Assume the calibrated 32k clock is accurate. */ @@ -358,7 +356,10 @@ int sun6i_rtc_ccu_probe(struct device *dev, void __iomem *reg) return 0; data = match->data; - have_iosc_calibration = data->have_iosc_calibration; + if (data->have_iosc_calibration) { + iosc_clk.features |= CCU_FEATURE_IOSC_CALIBRATION; + iosc_32k_clk.features |= CCU_FEATURE_IOSC_CALIBRATION; + } if (!data->have_ext_osc32k) { /* ext-osc32k-gate is an orphan, so do not register it. */ diff --git a/drivers/clk/sunxi-ng/ccu_common.h b/drivers/clk/sunxi-ng/ccu_common.h index bbec283b9d99..d9dc24ad5503 100644 --- a/drivers/clk/sunxi-ng/ccu_common.h +++ b/drivers/clk/sunxi-ng/ccu_common.h @@ -21,6 +21,7 @@ #define CCU_FEATURE_CLOSEST_RATE BIT(9) #define CCU_FEATURE_DUAL_DIV BIT(10) #define CCU_FEATURE_UPDATE_BIT BIT(11) +#define CCU_FEATURE_IOSC_CALIBRATION BIT(12) /* MMC timing mode switch bit */ #define CCU_MMC_NEW_TIMING_MODE BIT(30) -- 2.47.3