From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8F23241DEFC for ; Mon, 6 Jul 2026 13:21:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783344069; cv=none; b=EZ0j8lJejXZXBphgVh6yzx/NBd/gh6EZ+4FIwnTfcloTqevDzygJQ4FmJXCv9eNv26ZfFv4VRsQNuiB3WqoALoH3uJhDzyaRyhEC/tFtTFLOl4xFURcf4d4rR37vxD/XM8ibGSE/vsd9fdP8vnnwMqTQGadfSHJ0Gn9RY2g2N+E= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783344069; c=relaxed/simple; bh=o5XoyX1coHzwS5MK4Nao0YTpRLZfe0Qwh6ArwM+K5eE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GJjzfj6CnFU5jKbkhvkADfW5lhVjv7n7oOaWlvl2fpvkLQofFX8yur7XB0pSL8rXD9W3loXF2ryn1ehgLK8GmdvrasaOPw22O4qXNgVtFBNg7Od/oT9oBtPkjBaTl3t+eKDQIbaT180vSOh6S6QaAR3bmY2/qXft5XIRFO7ADMM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=DKOnK/pE; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=OJvDDSm6; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="DKOnK/pE"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="OJvDDSm6" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 666Ax7uH245538 for ; Mon, 6 Jul 2026 13:20:58 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= cyAtb4Z5AA87tJM4aAbz48OZuPpDfL6rZEVyCzADtro=; b=DKOnK/pElsldeHy8 xf7bnbvV6CW8Ru+3ADXgRRZ+r8m3JK2M/rguFQH/cIT6LfIpONjYgUWDcfZoP5ep B55O9SWLdP/00JALwAaA6neWEilJBquw8jxYgv7CC7/SrX8TRvXj+oeJlZHgQz3a H8W7KX3wa2nOAN1p3NsOiVjbqft8jrukYK0Ss0mpc0UMqHroH+EbedOTwqvsa0DL 6T6CsakHkogc2vuhB+AaEYHudxhP+wcmlTiyt7zZap54J2k7bC/Jp5w0A114MUGy 8eon6ZYoiTIkLDp0c10S7tvWRu6m8cU0Y+uO2b2oZK8HyVCORWflKLrw5j73X5UQ H19swA== Received: from mail-vk1-f198.google.com (mail-vk1-f198.google.com [209.85.221.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4f8a98gqn8-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 06 Jul 2026 13:20:57 +0000 (GMT) Received: by mail-vk1-f198.google.com with SMTP id 71dfb90a1353d-59d595bfd94so1055052e0c.3 for ; Mon, 06 Jul 2026 06:20:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1783344057; x=1783948857; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=cyAtb4Z5AA87tJM4aAbz48OZuPpDfL6rZEVyCzADtro=; b=OJvDDSm6ivf+pjbJ/vVnCuR+1YKZ7/weq+RKwK9B+EEvQ9PpFhZsdpu3ad7rYFWERJ x9YJjlawyM88zu0G7xkY4sxFdsTFJQFza0rvRxsO1MH3f/gc4vUf7GqFoD7RSk5OX71Z +XlZ+yj6JgSn7RV+MV8QYHvEiebe/XF3d5UunjIKg17forpmG8eCvpAxDX1AqrNxpuO4 euUV65ZK1iUoi/4SXZnw55Ssfw7rpAUd87IsIsQ2wqr++3DscfXGuNQdAymG6fcm8rlj S/rSFZj2zBd9w5B1ysMbfPBeY2GEn6U87XkFceWqxK7hTFjDobtfSA5Q8KlSFlNbcZnK I9mw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1783344057; x=1783948857; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=cyAtb4Z5AA87tJM4aAbz48OZuPpDfL6rZEVyCzADtro=; b=lrHXO9JUFlW4ToYBweGLYjDeYMADDAzYagVdzKmlQbwFFV8BJPE6I6+pdWEnwwX+S5 EsLZe/CSrvXbSmDeB/BD/oXaMModm4OcPz/GxaPbXSuzzwNEjKdVRUFUDL829sdSPY9Q tZznaKvegJP8XOdoJQLX8F6w1cV5btPugF7c4v4Psz+BHaDo+IvgijcFbwf7mEOZrq0p //GQXsc1O33rezfUD12Fez8sMRKyKWQPJ4BSbnXto71AwJjL8CWPNlLsatqAza57Lmhd +QLN43wM6HsHifuXJ1vHG9RM+6kilKtTJQ460ISqkJzfj4688MY1pccBULuLiWGo33CS EuJQ== X-Forwarded-Encrypted: i=1; AHgh+RrQmio7JJKet2RMJ3KXyQR8ZGXU29+hwzIwAVUGSTYtB1BJ6TUc3rQch1UO48SDfltkvPmy+wI1ja4xbj4=@vger.kernel.org X-Gm-Message-State: AOJu0YxnPdpiimRmP27REbvYy6RQjRoEwcAzYe7Az4ZlN+L5eGDvkgcB xItLYMDnILXWRQIH3PQVlS3YeZbbBkPSTZhRmjsc5QxJ7Usokk+xmbTrWtPGfsVgYPJZqkw6pl8 w1awo3fIJhBSomkj6VMUKn2XB4Qzi2c1/1sfNB8M2kFsUthK7a4wpyk6p2ED+mJeuHEk= X-Gm-Gg: AfdE7cksohtFH4lcACYCIDKzpgk8KRLTTdKfUjulEi2Zw2zz8Ej64sDLsBTHLbWOM7G bRgr907JJTnD9X0ivfwZPsAs1hwVs5ztsK8XLDUYX974C1Df5061NbdCun+IrRwbqQJpneiKeds E+J7HMJH8yoLwrefdT7vdt9ylXqKyF7XxVGtSfgBCGybidaDrYH+XfXu5HZfxmFukCLW/0/eU7x JHmH3O4Jod53mWwKLpTStVYy9pcuk4nibflFDxJxtO3ADAbDtibGnBkD8/q59WAuH92w2uDirUB opSbaim1I2YDcjUjbZ9jFpphrMRy4WIfRIYYmuox7UFzPdkt4/vzYqKQ2yZiLnXebmVAiwGy16E NBqY+qN+oAk0UvQQScZ5Oq3sNlt/Vxl894t8MLgCu X-Received: by 2002:a05:6122:511:b0:5bd:89bd:3543 with SMTP id 71dfb90a1353d-5be908b8787mr239544e0c.12.1783344056498; Mon, 06 Jul 2026 06:20:56 -0700 (PDT) X-Received: by 2002:a05:6122:511:b0:5bd:89bd:3543 with SMTP id 71dfb90a1353d-5be908b8787mr239501e0c.12.1783344056002; Mon, 06 Jul 2026 06:20:56 -0700 (PDT) Received: from brgl-qcom.local ([2a01:cb1d:dc:7e00:86f0:c42b:ef4c:d3bb]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-47ad69519c2sm25910584f8f.37.2026.07.06.06.20.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Jul 2026 06:20:55 -0700 (PDT) From: Bartosz Golaszewski Date: Mon, 06 Jul 2026 15:20:21 +0200 Subject: [PATCH net-next v12 6/7] net: stmmac: qcom-ethqos: factor out linux-level setup into a separate function Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260706-qcom-sa8255p-emac-v12-6-e3ab1ecf2901@oss.qualcomm.com> References: <20260706-qcom-sa8255p-emac-v12-0-e3ab1ecf2901@oss.qualcomm.com> In-Reply-To: <20260706-qcom-sa8255p-emac-v12-0-e3ab1ecf2901@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Vinod Koul , Giuseppe Cavallaro , Chen-Yu Tsai , Jernej Skrabec , Neil Armstrong , Kevin Hilman , Jerome Brunet , Shawn Guo , Fabio Estevam , Jan Petrous , s32@nxp.com, Mohd Ayaan Anwar , Romain Gantois , Geert Uytterhoeven , Magnus Damm , Maxime Ripard , Christophe Roullier , Bartosz Golaszewski , Radu Rendec Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Drew Fustini , linux-sunxi@lists.linux.dev, linux-amlogic@lists.infradead.org, linux-mips@vger.kernel.org, imx@lists.linux.dev, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org, sophgo@lists.linux.dev, linux-riscv@lists.infradead.org, brgl@kernel.org, Bartosz Golaszewski , Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=7477; i=bartosz.golaszewski@oss.qualcomm.com; h=from:subject:message-id; bh=o5XoyX1coHzwS5MK4Nao0YTpRLZfe0Qwh6ArwM+K5eE=; b=owEBbQKS/ZANAwAKAQWdLsv/NoTDAcsmYgBqS6ugRe+a+GryDL1J76nq4biCeYd856FUv7Nyv Nf2nUO9iSWJAjMEAAEKAB0WIQSR5RMt5bVGHXuiZfwFnS7L/zaEwwUCakuroAAKCRAFnS7L/zaE w6xiD/4+J5LNVCG5Z86VszoIsYGwT0dJEsVEiPC6rDFJKf65P1O47rUHECIq/QgsTO4TeJV0Pkd ab3Q6+oIERLPQfojD0eMzzMAca9aRETeb/CvucQmf5KfAuC3k7qrHiy5aPp1kKyjr0HB7hRIHE3 v9G3axp9WJBLUayEl/JRdqs1SbESZLn/HmbpEov7ZYb44LdGVUsv/YPPuWSROOtDCKeC1/vJ7Rb aJoXwVp8Gq9Au1mDdmEmoqxLlHuQke0ZOInkLmcFri9JGlRNTRn3qHyt8VrT7UdX7ZJIr1k1/rJ 6yVpByKuinB6zO5kl83DP2prFLk9ftB3E1NH//h/jYtWiinMEg50PwG+28BiK4ZTirU1T/C9Gpo jhB4fZa28P2VBSZojIEnPHYbWdtREAmHj2b7un/qpFpoufMzt2ESaqqjnWTrZZd+tzB6En3i0Sa z5ji97KT/lIXgOoY2/phJ/mL78UhCQglleBH/+hp4tyW6JzI/7auxlhIe+GFQlHfMMsfkHpEG5r ar37vEBYOhU3unaysR3FjsqboJbIbSw8tsvCkJXQT4RvBj4WFDgFUz8xCFpL1UmI04zstLuaQAA bPKVNM1lzHbsMMgqIsnTq5U07z8kSEFKvSNHMe7JrLwHBv2QI9Hx1mjLUVcnpdnnIx5hWYjqDfP pGRhfiMiJlo7QGg== X-Developer-Key: i=bartosz.golaszewski@oss.qualcomm.com; a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 X-Authority-Analysis: v=2.4 cv=SpigLvO0 c=1 sm=1 tr=0 ts=6a4babb9 cx=c_pps a=1Os3MKEOqt8YzSjcPV0cFA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=dj4JEN0qHmgdNMwDfcEA:9 a=QEXdDO2ut3YA:10 a=hhpmQAJR8DioWGSBphRh:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzA2MDEzNiBTYWx0ZWRfXwrHWkjjZAMKJ qy+O7uvk6KIqhlDJgrqr56gb8VIyLF+Hw3aafy/96fidlFT1rNXGEXLh6Yez2itqSpCsMyQzXVE gLQkLut+kRHyVLzLruSc08bOECGeu6NtIgqRP2nOoBuY055KqsyVSR0RJ5Y8sxF8v0sqOiZGLo/ JGy3mR04BDCOJV1gPDzW2Zzg33WKhmkJR/3eou9D31PTYnIpeJIfTJePvh8yiLW/b9QWFjYYmK5 jK00jY4zAAbaPqPF07BPBLL0oH3+g0FiarXSLVkxtdw1T/JTTw2kr+EUbepHr7Z+jhZP/v9MpGv r0ZGbgp4oe+9WliOGf404bkInPh8sV5PcNqaA1ZOh0jRBPb7+E54WCWTQ/7xFC6feOTDvSk+5s3 V8DmixC/rudLaMTpxouJwrN3Dpj0A/8Njmb2mT2qEUKFXRGNB+2/siDrDS9fcHXxqmfQWKZkCE2 7xgFTPZfV98i3lfvbeg== X-Proofpoint-Spam-Info: AW1haW4tMjYwNzA2MDEzNiBTYWx0ZWRfX07t6uPxIt6/M sGf07j2njF84yMzasTI+4S5w/C1zJLn2WewG0dAh1DAfcmUkrkzGROIgf5dUNwXHz62Vd27QBtE 9rXYF8FoLbEpocXE/MLwfn74cBXS9YU= X-Proofpoint-GUID: JpjSgjpiPfEwhgi9nIv_02rasrBZtzT3 X-Proofpoint-ORIG-GUID: JpjSgjpiPfEwhgi9nIv_02rasrBZtzT3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-06_01,2026-07-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 priorityscore=1501 spamscore=0 clxscore=1015 phishscore=0 bulkscore=0 adultscore=0 suspectscore=0 impostorscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607060136 Ahead of adding support for firmware-controlled EMAC variants, extend the ethqos_emac_driver_data structure with a setup() callback, implement it for the existing models and move all operations not required in SCMI mode into it. Signed-off-by: Bartosz Golaszewski --- .../ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 99 +++++++++++++++------- 1 file changed, 68 insertions(+), 31 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index fa3447b90315672d706d5ce7d710bdec6214e4e6..f379570f80680e96f027873cda6a6bca398e22dc 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -5,6 +5,7 @@ #include #include #include +#include #include #include @@ -81,6 +82,8 @@ #define SGMII_10M_RX_CLK_DVDR 0x31 +struct qcom_ethqos; + struct ethqos_emac_por { unsigned int offset; unsigned int value; @@ -95,6 +98,8 @@ struct ethqos_emac_driver_data { const char *link_clk_name; struct dwmac4_addrs dwmac4_addrs; bool needs_sgmii_loopback; + int (*setup)(struct qcom_ethqos *ethqos, + struct plat_stmmacenet_data *plat_dat); }; struct qcom_ethqos { @@ -199,6 +204,9 @@ static void ethqos_set_func_clk_en(struct qcom_ethqos *ethqos) rgmii_setmask(ethqos, RGMII_CONFIG_FUNC_CLK_EN, RGMII_IO_MACRO_CONFIG); } +static int ethqos_hlos_setup(struct qcom_ethqos *ethqos, + struct plat_stmmacenet_data *plat_dat); + static const struct ethqos_emac_por emac_v2_3_0_por[] = { { .offset = RGMII_IO_MACRO_CONFIG, .value = 0x00C01343 }, { .offset = SDCC_HC_REG_DLL_CONFIG, .value = 0x2004642C }, @@ -213,6 +221,7 @@ static const struct ethqos_emac_driver_data emac_v2_3_0_data = { .num_rgmii_por = ARRAY_SIZE(emac_v2_3_0_por), .rgmii_config_loopback_en = true, .has_emac_ge_3 = false, + .setup = ethqos_hlos_setup, }; static const struct ethqos_emac_por emac_v2_1_0_por[] = { @@ -229,6 +238,7 @@ static const struct ethqos_emac_driver_data emac_v2_1_0_data = { .num_rgmii_por = ARRAY_SIZE(emac_v2_1_0_por), .rgmii_config_loopback_en = false, .has_emac_ge_3 = false, + .setup = ethqos_hlos_setup, }; static const struct ethqos_emac_por emac_v3_0_0_por[] = { @@ -261,6 +271,7 @@ static const struct ethqos_emac_driver_data emac_v3_0_0_data = { .mtl_low_cred = 0x00008024, .mtl_low_cred_offset = 0x1000, }, + .setup = ethqos_hlos_setup, }; static const struct ethqos_emac_por emac_v4_0_0_por[] = { @@ -296,6 +307,7 @@ static const struct ethqos_emac_driver_data emac_v4_0_0_data = { .mtl_low_cred = 0x00008024, .mtl_low_cred_offset = 0x1000, }, + .setup = ethqos_hlos_setup, }; static int ethqos_dll_configure(struct qcom_ethqos *ethqos) @@ -685,6 +697,58 @@ static void ethqos_ptp_clk_freq_config(struct stmmac_priv *priv) netdev_dbg(priv->dev, "PTP rate %lu\n", plat_dat->clk_ptp_rate); } +static int ethqos_hlos_setup(struct qcom_ethqos *ethqos, + struct plat_stmmacenet_data *plat_dat) +{ + struct platform_device *pdev = ethqos->pdev; + struct device *dev = &pdev->dev; + int ret; + + ethqos->rgmii_base = devm_platform_ioremap_resource_byname(pdev, "rgmii"); + if (IS_ERR(ethqos->rgmii_base)) + return dev_err_probe(dev, PTR_ERR(ethqos->rgmii_base), + "Failed to map rgmii resource\n"); + + ethqos->link_clk = devm_clk_get(dev, ethqos->data->link_clk_name ?: "rgmii"); + if (IS_ERR(ethqos->link_clk)) + return dev_err_probe(dev, PTR_ERR(ethqos->link_clk), + "Failed to get link_clk\n"); + + plat_dat->clks_config = ethqos_clks_config; + + ret = ethqos_clks_config(ethqos, true); + if (ret) + return ret; + + ret = devm_add_action_or_reset(dev, ethqos_clks_disable, ethqos); + if (ret) + return ret; + + ethqos_set_clk_tx_rate(ethqos, NULL, plat_dat->phy_interface, SPEED_1000); + qcom_ethqos_set_sgmii_loopback(ethqos, true); + ethqos_set_func_clk_en(ethqos); + + switch (ethqos->phy_mode) { + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: + plat_dat->fix_mac_speed = ethqos_fix_mac_speed_rgmii; + break; + case PHY_INTERFACE_MODE_2500BASEX: + case PHY_INTERFACE_MODE_SGMII: + plat_dat->fix_mac_speed = ethqos_fix_mac_speed_sgmii; + break; + default: + break; + } + + plat_dat->set_clk_tx_rate = ethqos_set_clk_tx_rate; + plat_dat->dump_debug_regs = rgmii_dump; + + return 0; +} + static int qcom_ethqos_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -706,23 +770,20 @@ static int qcom_ethqos_probe(struct platform_device *pdev) "dt configuration failed\n"); } - plat_dat->clks_config = ethqos_clks_config; - ethqos = devm_kzalloc(dev, sizeof(*ethqos), GFP_KERNEL); if (!ethqos) return -ENOMEM; ethqos->phy_mode = plat_dat->phy_interface; + switch (ethqos->phy_mode) { case PHY_INTERFACE_MODE_RGMII: case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RGMII_RXID: case PHY_INTERFACE_MODE_RGMII_TXID: - plat_dat->fix_mac_speed = ethqos_fix_mac_speed_rgmii; break; case PHY_INTERFACE_MODE_2500BASEX: case PHY_INTERFACE_MODE_SGMII: - plat_dat->fix_mac_speed = ethqos_fix_mac_speed_sgmii; plat_dat->mac_finish = ethqos_mac_finish_serdes; break; default: @@ -732,24 +793,13 @@ static int qcom_ethqos_probe(struct platform_device *pdev) } ethqos->pdev = pdev; - ethqos->rgmii_base = devm_platform_ioremap_resource_byname(pdev, "rgmii"); - if (IS_ERR(ethqos->rgmii_base)) - return dev_err_probe(dev, PTR_ERR(ethqos->rgmii_base), - "Failed to map rgmii resource\n"); - data = of_device_get_match_data(dev); ethqos->data = data; - ethqos->link_clk = devm_clk_get(dev, data->link_clk_name ?: "rgmii"); - if (IS_ERR(ethqos->link_clk)) - return dev_err_probe(dev, PTR_ERR(ethqos->link_clk), - "Failed to get link_clk\n"); - - ret = ethqos_clks_config(ethqos, true); - if (ret) - return ret; + if (WARN_ON(!data->setup)) + return -EINVAL; - ret = devm_add_action_or_reset(dev, ethqos_clks_disable, ethqos); + ret = data->setup(ethqos, plat_dat); if (ret) return ret; @@ -758,21 +808,8 @@ static int qcom_ethqos_probe(struct platform_device *pdev) return dev_err_probe(dev, PTR_ERR(ethqos->serdes_phy), "Failed to get serdes phy\n"); - ethqos_set_clk_tx_rate(ethqos, NULL, plat_dat->phy_interface, - SPEED_1000); - - qcom_ethqos_set_sgmii_loopback(ethqos, true); - ethqos_set_func_clk_en(ethqos); - - /* The clocks are controlled by firmware, so we don't know for certain - * what clock rate is being used. Hardware documentation mentions that - * the AHB slave clock will be in the range of 50 to 100MHz, which - * equates to a MDC between 1.19 and 2.38MHz. - */ plat_dat->clk_csr = STMMAC_CSR_60_100M; plat_dat->bsp_priv = ethqos; - plat_dat->set_clk_tx_rate = ethqos_set_clk_tx_rate; - plat_dat->dump_debug_regs = rgmii_dump; plat_dat->ptp_clk_freq_config = ethqos_ptp_clk_freq_config; plat_dat->core_type = DWMAC_CORE_GMAC4; if (data->has_emac_ge_3) -- 2.47.3