From: Nikhil Kumar Singh <nikhilks@linux.ibm.com>
To: linuxppc-dev@lists.ozlabs.org, mkchauras@gmail.com
Cc: linux-kernel@vger.kernel.org, maddy@linux.ibm.com,
mpe@ellerman.id.au, npiggin@gmail.com, chleroy@kernel.org,
adityag@linux.ibm.com, mahesh@linux.ibm.com,
Nikhil Kumar Singh <nikhilks@linux.ibm.com>
Subject: [PATCH v2] powerpc/64s: Clarify copy_and_flush() cache sync loop comment
Date: Mon, 6 Jul 2026 13:57:08 +0530 [thread overview]
Message-ID: <20260706082708.43918-1-nikhilks@linux.ibm.com> (raw)
In-Reply-To: <20260701182756.273019-1-nikhilks@linux.ibm.com>
The value loaded into r0 in copy_and_flush() represents the number of
8-byte words processed between cache synchronization operations.
The existing comment refers to cache line size, which can make it appear
that the value is a cache line size in bytes rather than a loop count.
Clarify the comment to explain that the loop processes 8 words (64 bytes)
per cache synchronization iteration, and that increasing the value would
skip cache maintenance for intermediate cache lines.
This is a comment-only change with no functional impact.
Signed-off-by: Nikhil Kumar Singh <nikhilks@linux.ibm.com>
---
arch/powerpc/kernel/head_64.S | 20 ++++++++++++--------
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 63432a33ec49..a54f6f979173 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -713,14 +713,18 @@ p_end: .8byte _end - copy_to_here
_GLOBAL(copy_and_flush)
addi r5,r5,-8
addi r6,r6,-8
-4: li r0,8 /* Use the smallest common */
- /* denominator cache line */
- /* size. This results in */
- /* extra cache line flushes */
- /* but operation is correct. */
- /* Can't get cache line size */
- /* from NACA as it is being */
- /* moved too. */
+4: li r0,8 /* r0 is the number of 8-byte words */
+ /* to copy per cache sync iteration. */
+ /* 8 words * 8 bytes = 64 bytes. 64B is */
+ /* the current default cache line size. */
+ /* This is a loop count, not a byte */
+ /* count. Increasing it may skip */
+ /* dcbst/icbi for lines in between and */
+ /* leave stale instructions in icache. */
+ /* This results in extra cache line */
+ /* flushes but operation is correct. */
+ /* Can't get cache line size from NACA */
+ /* as it is being moved too. */
mtctr r0 /* put # words/line in ctr */
3: addi r6,r6,8 /* copy a cache line */
--
2.43.5
next prev parent reply other threads:[~2026-07-06 8:27 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 18:27 [PATCH] " Nikhil Kumar Singh
2026-07-01 18:38 ` Aditya Gupta
2026-07-02 5:28 ` Mukesh Kumar Chaurasiya
2026-07-06 8:27 ` Nikhil Kumar Singh [this message]
2026-07-07 5:38 ` [PATCH v2] " Mukesh Kumar Chaurasiya
2026-07-07 7:18 ` Nikhil Kumar Singh
2026-07-07 7:24 ` Mukesh Kumar Chaurasiya
2026-07-09 6:10 ` Nikhil Kumar Singh
2026-07-09 8:32 ` Mukesh Kumar Chaurasiya
2026-07-17 11:55 ` Amit Machhiwal
2026-07-17 6:40 ` Aditya Gupta
2026-07-17 14:52 ` Mahesh J Salgaonkar
2026-07-14 10:30 ` [PATCH] " Mahesh J Salgaonkar
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