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Mon, 06 Jul 2026 14:05:36 -0700 (PDT) X-Received: by 2002:a05:6a20:6a07:b0:3bf:9e25:1a13 with SMTP id adf61e73a8af0-3c08ed5762amr2779159637.15.1783371935725; Mon, 06 Jul 2026 14:05:35 -0700 (PDT) Received: from hu-akhilpo-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-13b659fa13bsm305031c88.15.2026.07.06.14.05.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Jul 2026 14:05:35 -0700 (PDT) From: Akhil P Oommen Date: Tue, 07 Jul 2026 02:34:36 +0530 Subject: [PATCH v5 4/7] arm64: dts: qcom: shikra: Add Adreno SMMU node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260707-shikra-gpu-v5-4-d2f373912d3f@oss.qualcomm.com> References: <20260707-shikra-gpu-v5-0-d2f373912d3f@oss.qualcomm.com> In-Reply-To: <20260707-shikra-gpu-v5-0-d2f373912d3f@oss.qualcomm.com> To: Rob Clark , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Will Deacon , Robin Murphy , "Joerg Roedel (AMD)" , Bjorn Andersson Cc: Bibek Kumar Patro , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Akhil P Oommen , Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; 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Signed-off-by: Bibek Kumar Patro Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Signed-off-by: Akhil P Oommen --- arch/arm64/boot/dts/qcom/shikra.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi index be443b362576..bb11e832d9a6 100644 --- a/arch/arm64/boot/dts/qcom/shikra.dtsi +++ b/arch/arm64/boot/dts/qcom/shikra.dtsi @@ -2005,6 +2005,35 @@ gpucc: clock-controller@5990000 { #power-domain-cells = <1>; }; + adreno_smmu: iommu@59a0000 { + compatible = "qcom,shikra-smmu-500", "qcom,adreno-smmu", + "qcom,smmu-500", "arm,mmu-500"; + reg = <0x0 0x059a0000 0x0 0x10000>; + #iommu-cells = <2>; + #global-interrupts = <1>; + + interrupts = , + , + , + , + , + , + , + , + ; + + clocks = <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>, + <&gcc GCC_GPU_MEMNOC_GFX_CLK>, + <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>, + <&gpucc GPU_CC_AHB_CLK>; + clock-names = "hlos", + "bus", + "iface", + "ahb"; + + power-domains = <&gpucc GPU_CX_GDSC>; + }; + dispcc: clock-controller@5f00000 { compatible = "qcom,shikra-dispcc", "qcom,qcm2290-dispcc"; reg = <0x0 0x05f00000 0x0 0x20000>; -- 2.54.0