From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 585F13D331A; Thu, 9 Jul 2026 06:35:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783578907; cv=none; b=SgwhRV0G2jSLVPC4YLpOez20tkUSlOui6lqh5t1IBfMBG+jjWJwetFjaWs+fOhew79uvxvHNBerC/32j8iGmzkdoL2vlzrdX6uAotBckoU46Y+tPkpJdXQ+ZzIKDiECKWBVKplP8uw9QQq03HD1sI/93mWUaG2RxAElF16HA3B0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783578907; c=relaxed/simple; bh=4Q/xKgsoCvoP99Pyvwm7k8kBOxUSZolH1xqg4ZCTm1o=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=f8z5IQlWtbKAjIx19r7wMjAz1PE5QplVNiLd/+W/2UpalUabdH3xjydFgTae/2GlsYF5pIg0s1O/6cJhTYAf7qcFgoVGSyewX01E95BgsutdPhix7hcplIpT3QtEcbi7ZysbtI0hgD2pwESs8TZYPxumv4SMFPo/24seITycnw8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=TmTwef20; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="TmTwef20" X-UUID: 4e7807ea7b6011f18dc8c9802ae25ab1-20260709 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=UsOpIbZPIpW3vePq2TGAjEbBxlV5IW78VvRPXgOdMvE=; b=TmTwef20VtQuWmm3QLLjD+t1N0SFS2pN+xkU2driEp0dh/cf4uNHIUI/VCMN+UjNqG4GGDbxVP9pXLPuS1k17GVbhPmRhUnPnLMVk7cWFX4+SyRb+LXw/6g6XJumW75VCAEMU9GRbu2KRjuQewrvgxYtYRiXWqWok6EdIG7T3Rs=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.17,REQID:a3f0ca44-4541-4723-95ee-716c869b37cb,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:d497b38,CLOUDID:c722a303-430e-43d5-9a6c-19a994ddbd60,B ulkID:nil,BulkQuantity:0,SF:81|82|102|836|865|888|898,TC:-5,Content:0|15|5 0|99,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI:0, OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 4e7807ea7b6011f18dc8c9802ae25ab1-20260709 Received: from mtkmbs09n2.mediatek.inc [(172.21.101.94)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1982506427; Thu, 09 Jul 2026 14:34:58 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Thu, 9 Jul 2026 14:34:57 +0800 Received: from mtksitap99.mediatek.inc (10.233.130.16) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Thu, 9 Jul 2026 14:34:57 +0800 From: Justin Yeh To: Sean Wang , Linus Walleij , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , Justin Yeh Subject: [PATCH v5 1/4] pinctrl: mediatek: use devm_gpiochip_add_data() for GPIO chip Date: Thu, 9 Jul 2026 14:33:46 +0800 Message-ID: <20260709063450.1615041-2-justin.yeh@mediatek.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20260709063450.1615041-1-justin.yeh@mediatek.com> References: <20260709063450.1615041-1-justin.yeh@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-MTK: N The gpio_chip is allocated with device-managed memory but registered with the non-managed gpiochip_add_data(). This was harmless while the drivers were built-in, but once they can be built as modules and unbound/rmmod'd, devm frees the gpio_chip's memory while it is still registered, causing a use-after-free. Register it with devm_gpiochip_add_data() so it shares the same device-managed lifecycle, which also lets the manual gpiochip_remove() error paths go away. Fixes: a6df410d420a ("pinctrl: mediatek: Add Pinctrl/GPIO driver for mt8135.") Fixes: 805250982bb5 ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings") Fixes: e78d57b2f87c ("pinctrl: mediatek: add pinctrl-moore that implements the generic pinctrl dt-bindings") Signed-off-by: Justin Yeh --- drivers/pinctrl/mediatek/pinctrl-moore.c | 6 ++---- drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 14 ++++---------- drivers/pinctrl/mediatek/pinctrl-paris.c | 2 +- 3 files changed, 7 insertions(+), 15 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-moore.c b/drivers/pinctrl/mediatek/pinctrl-moore.c index 17e30f83dc19..38f15dbe9a28 100644 --- a/drivers/pinctrl/mediatek/pinctrl-moore.c +++ b/drivers/pinctrl/mediatek/pinctrl-moore.c @@ -594,7 +594,7 @@ static int mtk_build_gpiochip(struct mtk_pinctrl *hw) chip->base = -1; chip->ngpio = hw->soc->npins; - ret = gpiochip_add_data(chip, hw); + ret = devm_gpiochip_add_data(hw->dev, chip, hw); if (ret < 0) return ret; @@ -608,10 +608,8 @@ static int mtk_build_gpiochip(struct mtk_pinctrl *hw) if (!of_property_present(hw->dev->of_node, "gpio-ranges")) { ret = gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0, chip->ngpio); - if (ret < 0) { - gpiochip_remove(chip); + if (ret < 0) return ret; - } } return 0; diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c index dd2c8aa03938..791eddd7a2c6 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c @@ -1130,30 +1130,24 @@ int mtk_pctrl_init(struct platform_device *pdev, pctl->chip->parent = &pdev->dev; pctl->chip->base = -1; - ret = gpiochip_add_data(pctl->chip, pctl); + ret = devm_gpiochip_add_data(&pdev->dev, pctl->chip, pctl); if (ret) return -EINVAL; /* Register the GPIO to pin mappings. */ ret = gpiochip_add_pin_range(pctl->chip, dev_name(&pdev->dev), 0, 0, pctl->devdata->npins); - if (ret) { - ret = -EINVAL; - goto chip_error; - } + if (ret) + return -EINVAL; /* Only initialize EINT if we have EINT pins */ if (data->eint_hw.ap_num > 0) { ret = mtk_eint_init(pctl, pdev); if (ret) - goto chip_error; + return ret; } return 0; - -chip_error: - gpiochip_remove(pctl->chip); - return ret; } int mtk_pctrl_common_probe(struct platform_device *pdev) diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/mediatek/pinctrl-paris.c index 23f04b24fd65..09098b68f725 100644 --- a/drivers/pinctrl/mediatek/pinctrl-paris.c +++ b/drivers/pinctrl/mediatek/pinctrl-paris.c @@ -957,7 +957,7 @@ static int mtk_build_gpiochip(struct mtk_pinctrl *hw) chip->base = -1; chip->ngpio = hw->soc->npins; - ret = gpiochip_add_data(chip, hw); + ret = devm_gpiochip_add_data(hw->dev, chip, hw); if (ret < 0) return ret; -- 2.45.2