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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-311838c9235sm36496290eec.21.2026.07.10.06.21.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Jul 2026 06:21:02 -0700 (PDT) From: Qiang Yu Date: Fri, 10 Jul 2026 06:20:57 -0700 Subject: [PATCH] PCI: qcom: Clear Attention Button Present in Slot Capabilities Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260710-clear_abp_0710-v1-1-efd63ebdaa09@oss.qualcomm.com> X-B4-Tracking: v=1; b=H4sIALjxUGoC/yXMTQqAIBBA4avErAtUor+rRIjaWBNRoRVBePesl t/ivRs8OkIPTXKDw5M8rUsETxMwo1oGzKiPBsFEwUrOMjOjclLpTX4UtuJYC133KocYbQ4tXd+ w7X77Q09o9vcCITyncNhGcgAAAA== X-Change-ID: 20260710-clear_abp_0710-2f81e92b9da4 To: Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Qiang Yu X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1783689661; l=2992; i=qiang.yu@oss.qualcomm.com; s=20250513; h=from:subject:message-id; bh=AmbrJkzC68B4rRpQK84/FFjOkbtbYYveaYqL5MXvDao=; b=E4pzDzd8NMsd8khB8GflJNpFbnVr4eGdKgjnZj7qBSStgpXXw4uWnq0wcOThRntFfr5TYBW8Q aFeYwv8n9s5BDLRRnyiCMjhFPdT1Qm7cnEUTAm/vo47djVgZgZePNCW X-Developer-Key: i=qiang.yu@oss.qualcomm.com; a=ed25519; pk=Rr94t+fykoieF1ngg/bXxEfr5KoQxeXPtYxM8fBQTAI= X-Proofpoint-Spam-Info: AW1haW4tMjYwNzEwMDEzMiBTYWx0ZWRfX6bCCz9dd2cYL rMnc3HpYS7v/YZiTZrztTkT5wjtkNPYlPVwGaGBcmYEsAxg4WtOcxLhY4iO9mzXcOaunX+GiT3b q78laSifeFEY8EiG5UCCS4c35smddyU= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzEwMDEzMiBTYWx0ZWRfX7FxND2xklcDk PcalWFJU5JlmbUsldviFQggVYR1Yt85MmOKX9elEBBF2LN2egzqau6rG3A0J5Suy8WzwJMgOJH+ PlUKKAZSBDU7728WFEjurc+P9PIGfthT+v7u0udD+9mCVa5Azros53RMIj/SqAMNeFCTUvtpJfZ Ja0uB8eWFRAVkq7soqpQna2xOknIOl+yUCGKGkm5Ae9pB5UOTyvHR5ELx81lhWtC1rWJK+3rW3Q BR98Jp6VIQ/PsZXznH4VM9DsZuUhdrQDpwnYr77OcnLJL4dggNd/ZwBSByAvJ/hNxaY2SPJEeeK 7IKG84VwDQlWp0mQz4lDyf9OP2jBhuq/N97MluUFN0Fs+Ztxj5VX3oWYz/9YgwhqAocGzo6mDgc 87NSmBJJ6BfpAcDPJIzvm89oGiUbZZs5WJ92GsVaI71Z+ojxfiK8NfsQ3BNstKw9KrBR/gYDdiT N6HgZhOFMmK3RmIud1Q== X-Proofpoint-GUID: B5LeSAzwPnqa8S3S5-LNGKX_sBsYCQZx X-Authority-Analysis: v=2.4 cv=HqpG3UTS c=1 sm=1 tr=0 ts=6a50f1bf cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=864Vm389qZSSETCWT5kA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-ORIG-GUID: B5LeSAzwPnqa8S3S5-LNGKX_sBsYCQZx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-10_03,2026-07-10_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 malwarescore=0 impostorscore=0 lowpriorityscore=0 suspectscore=0 phishscore=0 priorityscore=1501 bulkscore=0 clxscore=1015 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607100132 Qcom PCIe Root Ports advertise the Attention Button Present (ABP) bit in the Slot Capabilities register, but the slots have no attention button. When ABP is set, pcie_enable_notification() in the pciehp driver enables the Attention Button Pressed interrupt (ABPE) and leaves the Presence Detect Changed interrupt (PDCE) disabled. As a result, presence detect changes are never reported and surprise hot-plug detection that relies on Presence Detect Changed events does not work. While at it, rename qcom_pcie_set_slot_nccs() to qcom_pcie_set_slot_cap() since it now programs more than just the NCCS field. Signed-off-by: Qiang Yu --- drivers/pci/controller/dwc/pcie-qcom.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index b193c989b2b8..89c2d4cb1fbe 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -358,7 +358,7 @@ static void qcom_pcie_clear_aspm_l0s(struct dw_pcie *pci) dw_pcie_dbi_ro_wr_dis(pci); } -static void qcom_pcie_set_slot_nccs(struct dw_pcie *pci) +static void qcom_pcie_set_slot_cap(struct dw_pcie *pci) { u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP); u32 val; @@ -372,6 +372,11 @@ static void qcom_pcie_set_slot_nccs(struct dw_pcie *pci) */ val = readl(pci->dbi_base + offset + PCI_EXP_SLTCAP); val |= PCI_EXP_SLTCAP_NCCS; + /* + * Qcom PCIe Root Ports do not support Attention Button, so clear + * Attention Button Present in Slot Capabilities. + */ + val &= ~PCI_EXP_SLTCAP_ABP; writel(val, pci->dbi_base + offset + PCI_EXP_SLTCAP); dw_pcie_dbi_ro_wr_dis(pci); @@ -580,7 +585,7 @@ static int qcom_pcie_post_init_2_1_0(struct qcom_pcie *pcie) writel(CFG_BRIDGE_SB_INIT, pci->dbi_base + AXI_MSTR_RESP_COMP_CTRL1); - qcom_pcie_set_slot_nccs(pcie->pci); + qcom_pcie_set_slot_cap(pcie->pci); return 0; } @@ -660,7 +665,7 @@ static int qcom_pcie_post_init_1_0_0(struct qcom_pcie *pcie) writel(val, pcie->parf + PARF_AXI_MSTR_WR_ADDR_HALT); } - qcom_pcie_set_slot_nccs(pcie->pci); + qcom_pcie_set_slot_cap(pcie->pci); return 0; } @@ -759,7 +764,7 @@ static int qcom_pcie_post_init_2_3_2(struct qcom_pcie *pcie) val |= EN; writel(val, pcie->parf + PARF_AXI_MSTR_WR_ADDR_HALT_V2); - qcom_pcie_set_slot_nccs(pcie->pci); + qcom_pcie_set_slot_cap(pcie->pci); return 0; } @@ -1078,7 +1083,7 @@ static int qcom_pcie_post_init_2_7_0(struct qcom_pcie *pcie) writel(WR_NO_SNOOP_OVERRIDE_EN | RD_NO_SNOOP_OVERRIDE_EN, pcie->parf + PARF_NO_SNOOP_OVERRIDE); - qcom_pcie_set_slot_nccs(pcie->pci); + qcom_pcie_set_slot_cap(pcie->pci); return 0; } --- base-commit: 3edb3a038d423480efeb204dbc6ddc9a292f8ecb change-id: 20260710-clear_abp_0710-2f81e92b9da4 Best regards, -- Qiang Yu