From: Josh Hilke <jrhilke@google.com>
To: David Matlack <dmatlack@google.com>, Alex Williamson <alex@shazbot.org>
Cc: Shuah Khan <shuah@kernel.org>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
linux-kselftest@vger.kernel.org,
Vipin Sharma <vipinsh@google.com>,
Josh Hilke <jrhilke@google.com>,
Alex Williamson <alex.williamson@nvidia.com>
Subject: [PATCH v4 8/9] vfio: selftests: igb: Factor hardware programming into igb_hw_init()
Date: Fri, 10 Jul 2026 22:06:52 +0000 [thread overview]
Message-ID: <20260710-igb_v3_b4-v4-8-56e7e2576cc1@google.com> (raw)
In-Reply-To: <20260710-igb_v3_b4-v4-0-56e7e2576cc1@google.com>
From: Alex Williamson <alex.williamson@nvidia.com>
Split the device register programming out of igb_init() into a new
igb_hw_init() helper so that the same sequence can be re-run after a
VFIO_DEVICE_RESET to restore the registers that CTRL.RST clears. No
functional change for the initial path.
igb_init() now performs the one-shot setup: region size assertion, BAR
mapping, CTRL.RST + IMC mask-all to put the device into a known state,
and vfio_pci_msix_enable() to set up the kernel-side IRQ trigger.
igb_hw_init() does the rest: ring pointer setup and IOVA calc,
CTRL_EXT, PCI bus master, GCR, PHY loopback, descriptor rings, RCTL,
TCTL, GPIE/EIAC/EIAM/EIMS/IVAR, and driver-state initialization.
vfio_pci_msix_enable() moves from after RCTL/TCTL to before all
device-side programming. Its only side effects are the VFIO kernel
IRQ trigger setup and the PCI MSI-X capability bits in config space;
neither has any ordering dependency on the 82576 device register
writes performed in igb_hw_init(). Performing it once in igb_init()
keeps igb_hw_init() reusable from the reset recovery path (which uses
vfio_pci_irq_reenable() to re-arm the existing trigger).
Assisted-by: Claude:claude-opus-4-7
Signed-off-by: Alex Williamson <alex.williamson@nvidia.com>
Reviewed-by: David Matlack <dmatlack@google.com>
---
tools/testing/selftests/vfio/lib/drivers/igb/igb.c | 61 ++++++++++++++--------
1 file changed, 40 insertions(+), 21 deletions(-)
diff --git a/tools/testing/selftests/vfio/lib/drivers/igb/igb.c b/tools/testing/selftests/vfio/lib/drivers/igb/igb.c
index ac116834bbf6..23d924b791d3 100644
--- a/tools/testing/selftests/vfio/lib/drivers/igb/igb.c
+++ b/tools/testing/selftests/vfio/lib/drivers/igb/igb.c
@@ -188,7 +188,13 @@ static int igb_probe(struct vfio_pci_device *device)
return 0;
}
-static void igb_init(struct vfio_pci_device *device)
+/*
+ * Program the device into a usable state. Split out of igb_init() so it
+ * can be reused after a device reset to re-program the registers that
+ * CTRL.RST clears. Expects bar0 to be mapped and MSI-X already enabled
+ * via VFIO.
+ */
+static void igb_hw_init(struct vfio_pci_device *device)
{
struct igb *igb = to_igb_state(device);
u64 iova_tx, iova_rx;
@@ -196,26 +202,9 @@ static void igb_init(struct vfio_pci_device *device)
u16 cmd_reg;
int retries;
- VFIO_ASSERT_GE(device->driver.region.size, sizeof(struct igb));
-
- /* Set up rings and calculate IOVAs */
- igb->bar0 = device->bars[0].vaddr;
-
iova_tx = to_iova(device, igb->tx_ring);
iova_rx = to_iova(device, igb->rx_ring);
- /* Reset device and disable all interrupts */
- igb_write32(igb, E1000_CTRL, igb_read32(igb, E1000_CTRL) | E1000_CTRL_RST);
- /*
- * Must wait at least 1 millisecond after setting the reset bit before
- * checking if this device is ready to be used (82576 datasheet section
- * 4.2.1.6.1).
- */
- usleep(1000);
- while (igb_read32(igb, E1000_CTRL) & E1000_CTRL_RST)
- usleep(10);
- igb_write32(igb, E1000_IMC, 0xFFFFFFFF);
-
/* Signal that the driver is loaded */
ctrl = igb_read32(igb, E1000_CTRL_EXT);
ctrl |= E1000_CTRL_EXT_DRV_LOAD;
@@ -305,9 +294,6 @@ static void igb_init(struct vfio_pci_device *device)
igb_write32(igb, E1000_RCTL, rctl);
igb_write32(igb, E1000_TCTL, E1000_TCTL_EN);
- /* Enable MSI-X with 1 vector for the test */
- vfio_pci_msix_enable(device, MSIX_VECTOR, 1);
-
/*
* Program MSI-X interrupt routing per 82576 datasheet:
*
@@ -347,6 +333,39 @@ static void igb_init(struct vfio_pci_device *device)
device->driver.msi = MSIX_VECTOR;
}
+static void igb_init(struct vfio_pci_device *device)
+{
+ struct igb *igb = to_igb_state(device);
+
+ VFIO_ASSERT_GE(device->driver.region.size, sizeof(struct igb));
+
+ igb->bar0 = device->bars[0].vaddr;
+
+ /* Reset device and disable all interrupts. */
+ igb_write32(igb, E1000_CTRL, igb_read32(igb, E1000_CTRL) | E1000_CTRL_RST);
+ /*
+ * Must wait at least 1 millisecond after setting the reset bit before
+ * checking if this device is ready to be used (82576 datasheet section
+ * 4.2.1.6.1).
+ */
+ usleep(1000);
+ while (igb_read32(igb, E1000_CTRL) & E1000_CTRL_RST)
+ usleep(10);
+ igb_write32(igb, E1000_IMC, 0xFFFFFFFF);
+
+ /*
+ * Enable MSI-X via VFIO before device-side register programming.
+ * vfio_pci_msix_enable() only touches the VFIO IRQ machinery and the
+ * PCI MSI-X capability via config space; it has no ordering
+ * dependency on the device-side writes performed by igb_hw_init().
+ * Placing it here keeps igb_hw_init() reusable from the reset
+ * recovery path (which calls vfio_pci_irq_reenable() instead).
+ */
+ vfio_pci_msix_enable(device, MSIX_VECTOR, 1);
+
+ igb_hw_init(device);
+}
+
static void igb_remove(struct vfio_pci_device *device)
{
struct igb *igb = to_igb_state(device);
--
2.55.0.795.g602f6c329a-goog
next prev parent reply other threads:[~2026-07-10 22:06 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-10 22:06 [PATCH v4 0/9] vfio: selftests: Add driver for Intel Ethernet Gigabit Controller (IGB) Josh Hilke
2026-07-10 22:06 ` [PATCH v4 1/9] vfio: selftests: igb: Add driver for IGB QEMU device Josh Hilke
2026-07-10 22:06 ` [PATCH v4 2/9] vfio: selftests: igb: Use PHY internal loopback on 82576 Josh Hilke
2026-07-10 22:06 ` [PATCH v4 3/9] vfio: selftests: igb: Use advanced TX and RX descriptors Josh Hilke
2026-07-10 22:06 ` [PATCH v4 4/9] vfio: selftests: igb: Program MSI-X interrupt routing Josh Hilke
2026-07-10 22:06 ` [PATCH v4 5/9] vfio: selftests: igb: Extend memcpy completion timeout for line-rate hardware Josh Hilke
2026-07-10 22:06 ` [PATCH v4 6/9] vfio: selftests: igb: Disable PCIe completion timeout retries Josh Hilke
2026-07-10 22:06 ` [PATCH v4 7/9] vfio: selftests: Add helpers to re-enable interrupts Josh Hilke
2026-07-10 22:06 ` Josh Hilke [this message]
2026-07-10 22:06 ` [PATCH v4 9/9] vfio: selftests: igb: Recover after DMA-read faults Josh Hilke
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260710-igb_v3_b4-v4-8-56e7e2576cc1@google.com \
--to=jrhilke@google.com \
--cc=alex.williamson@nvidia.com \
--cc=alex@shazbot.org \
--cc=dmatlack@google.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-kselftest@vger.kernel.org \
--cc=shuah@kernel.org \
--cc=vipinsh@google.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®