From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DC179423760 for ; Fri, 10 Jul 2026 11:55:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783684566; cv=none; b=LFRhWglGWnMRMs70Dc0uCDx3M1udyqoQwx7pxACWsbKF8KgAPNu7oRKxhgfT5zCizp48ij5I4WdqwqHtpLClaHwGkyib8dKSh2MQC5IP+9uhpC8yPE2dv2CDAgDxwGu2pHdScl3L3pG1sL0yLyQy/gR6Ct0Jrmf2TLM0Wqilebc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783684566; c=relaxed/simple; bh=HDM4yjwF3ewZgXyeAirDLJ8wrUsfMzbhBvuPa4qtLv8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cVC+GlMSRhOaCIy2jea4W0M9JEIQVPcOJkNotDIJ/9KjRGp/ctWLyYPSruyGAZiEyEl0U3FuZHeMxA5PN+fkmB/b4ua8b7kQJPIJNOzmfAY/iGCOgDFNEV7g6sZRn50Ojjc+Ft+3LXpQ7xfAPI1dsGTbIJWsA3uEZoxVPu/Z8ew= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=VsUK0KH3; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="VsUK0KH3" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 966141EA6; Fri, 10 Jul 2026 04:55:53 -0700 (PDT) Received: from e134344.cambridge.arm.com (e134344.arm.com [10.2.212.8]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A42933F85F; Fri, 10 Jul 2026 04:55:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1783684557; bh=HDM4yjwF3ewZgXyeAirDLJ8wrUsfMzbhBvuPa4qtLv8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VsUK0KH3Zcuu32dIqSPPH27+OGK1LiJAGY9Cgr5YxZBYv4dIDQe2/YgrEER+Q/HEF NNDssTIOzGvHglvgobuW6C8+pSxJCH2kgkXLpQBdW1EGPz23Y69r99u60jnrIfCKuv +Enw3QBiG0JoVjHFpN60R6A3QVgDFO2cTczr/eSY= From: Ben Horgan To: ben.horgan@arm.com Cc: james.morse@arm.com, reinette.chatre@intel.com, fenghuay@nvidia.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dave.martin@arm.com, andre.przywara@arm.com Subject: [PATCH v1 01/11] arm_mpam: Move MPAMF_ECR write helpers to allow reuse Date: Fri, 10 Jul 2026 12:55:35 +0100 Message-ID: <20260710115546.29644-2-ben.horgan@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260710115546.29644-1-ben.horgan@arm.com> References: <20260710115546.29644-1-ben.horgan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit In preparation for calling mpam_enable_msc_ecr() from the CPU hotplug handlers move it higher in the file. Move mpam_disable_msc_ecr() too to keep them together. Signed-off-by: Ben Horgan --- drivers/resctrl/mpam_devices.c | 38 +++++++++++++++++----------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c index b69f99488111..82966ca2a631 100644 --- a/drivers/resctrl/mpam_devices.c +++ b/drivers/resctrl/mpam_devices.c @@ -1813,6 +1813,25 @@ static void mpam_reprogram_msc(struct mpam_msc *msc) mutex_unlock(&msc->cfg_lock); } +static int mpam_enable_msc_ecr(void *_msc) +{ + struct mpam_msc *msc = _msc; + + __mpam_write_reg(msc, MPAMF_ECR, MPAMF_ECR_INTEN); + + return 0; +} + +/* This can run in mpam_disable(), and the interrupt handler on the same CPU */ +static int mpam_disable_msc_ecr(void *_msc) +{ + struct mpam_msc *msc = _msc; + + __mpam_write_reg(msc, MPAMF_ECR, 0); + + return 0; +} + static void _enable_percpu_irq(void *_irq) { int *irq = _irq; @@ -2435,25 +2454,6 @@ static char *mpam_errcode_names[16] = { [12 ... 15] = "Reserved" }; -static int mpam_enable_msc_ecr(void *_msc) -{ - struct mpam_msc *msc = _msc; - - __mpam_write_reg(msc, MPAMF_ECR, MPAMF_ECR_INTEN); - - return 0; -} - -/* This can run in mpam_disable(), and the interrupt handler on the same CPU */ -static int mpam_disable_msc_ecr(void *_msc) -{ - struct mpam_msc *msc = _msc; - - __mpam_write_reg(msc, MPAMF_ECR, 0); - - return 0; -} - static irqreturn_t __mpam_irq_handler(int irq, struct mpam_msc *msc) { u64 reg; -- 2.43.0