From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5315B314A79 for ; Sat, 11 Jul 2026 02:56:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783738600; cv=none; b=obcXXNScVfcxm1mMfDKnFI+z9VY+SSpif/7gF9mU9n+czI115fxE4mFdls4hsJNCmrVQwIP8xLDaRWKm6xvm4DHyw7tCZf4FHhszWKUODlY6jAhaloIxeSsI8Ig2aYlfJ/8xn+511bWlPcPhqXMEuiR8Mj3++nS14KejTvP98Q8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783738600; c=relaxed/simple; bh=jUP46rCXR5p1gO8AkvSmHQmoyTlzoqte4KPKu2WTmp8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=szCiADOBR5TWHUZpMUyDOtF+FTCWabPW0SAYny8RT5ssP7GgALDuy59Uvlfx0SROquq8xKrutSW8cMY5csMlV1ErEXqkp3Q+oBR1wP7XIKmcZ2qozmNkOhso3wMJ0q+yyFCGCXG4sCYZRGVz1ViHHu0PKBdGDq2a1k8KV5HJ7nM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=d4fXity9; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="d4fXity9" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1783738599; x=1815274599; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jUP46rCXR5p1gO8AkvSmHQmoyTlzoqte4KPKu2WTmp8=; b=d4fXity9CCXFwF3rjrF09lBMbCXHWpPFGwmNxjy1iXCS0NcZXzztvAxW RdgyGxWpeNGChgDZQYJalpezfxYTOGv3YP+4T26cliGcidqjFwq6Q9xeN BZFxwSgwVNYupYpjTKlWa+WhkUyu/s/WZuqeL64PVl2DJ8Q08w//gz3SE mtZIXmGSy2dgeNhGeGO916rHFTB6oKh0DOmwhmXjn+5k0ph+eBeueUkYv /MLp0rqV6WtdV0rgH6a1nF0svTo9l+IIq3XUGemArRJox0p4nAh7LY3g7 9BtjgOuJAXjFLTvj6SQfGEHP3OjvlqFEYzlLFjuiX+6hDUjGcgOxx5x3J A==; X-CSE-ConnectionGUID: yJllt8KyQ6mL++4dKcpAEQ== X-CSE-MsgGUID: SZ3aT09uRKOgepfoLkX/PA== X-IronPort-AV: E=McAfee;i="6800,10657,11841"; a="101986310" X-IronPort-AV: E=Sophos;i="6.25,154,1779174000"; d="scan'208";a="101986310" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jul 2026 19:56:31 -0700 X-CSE-ConnectionGUID: dQVDfjTAQuWoSiYkAj9KoA== X-CSE-MsgGUID: kr458sBhTEGlVxy46APNPQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,154,1779174000"; d="scan'208";a="256987764" Received: from gsse-cloud1.jf.intel.com ([10.54.39.91]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jul 2026 19:56:30 -0700 From: Matthew Brost To: intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: Carlos Santa , Ryan Neph , Christian Koenig , Huang Rui , Matthew Auld , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , linux-kernel@vger.kernel.org, =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= Subject: [PATCH v3 21/33] drm/xe: Add defrag GT stats Date: Fri, 10 Jul 2026 19:56:07 -0700 Message-Id: <20260711025619.2540575-22-matthew.brost@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260711025619.2540575-1-matthew.brost@intel.com> References: <20260711025619.2540575-1-matthew.brost@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add observability for the page defragmentation worker. Introduce four primary-GT statistics counters: defrag_added_count (BOs queued onto the defrag list after being backed at a sub-optimal page order), defrag_success_count (BOs fully re-backed at the beneficial order), defrag_partial_success_count (BOs only partially re-backed at the beneficial order) defrag_failed_count (attempts that failed and left the BO on its original backing) and defrag_mb_moved. The ineligible/already-removed fast path is intentionally not counted as either success or failure. Cc: Carlos Santa Cc: Ryan Neph Cc: Christian Koenig Cc: Huang Rui Cc: Matthew Auld Cc: Maarten Lankhorst Cc: Maxime Ripard Cc: Thomas Zimmermann Cc: David Airlie Cc: Simona Vetter Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Cc: Thomas Hellström Assisted-by: GitHub_Copilot:claude-opus-4.8 Signed-off-by: Matthew Brost --- drivers/gpu/drm/xe/xe_bo.c | 18 +++++++++++++++++- drivers/gpu/drm/xe/xe_gt_stats.c | 5 +++++ drivers/gpu/drm/xe/xe_gt_stats_types.h | 17 +++++++++++++++++ 3 files changed, 39 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c index 907cfa57481f..073d926ef9ac 100644 --- a/drivers/gpu/drm/xe/xe_bo.c +++ b/drivers/gpu/drm/xe/xe_bo.c @@ -26,6 +26,7 @@ #include "xe_dma_buf.h" #include "xe_drm_client.h" #include "xe_ggtt.h" +#include "xe_gt_stats.h" #include "xe_map.h" #include "xe_migrate.h" #include "xe_pat.h" @@ -1160,6 +1161,8 @@ static void xe_bo_defrag_add(struct xe_bo *bo) xe->mem.defrag.interval_ms = XE_BO_DEFRAG_INTERVAL_MS; list_add_tail(&bo->defrag_link, &xe->mem.defrag.list); atomic_inc(&xe->mem.defrag.count); + xe_gt_stats_incr(xe_root_mmio_gt(xe), + XE_GT_STATS_ID_DEFRAG_ADDED_COUNT, 1); } } @@ -1274,8 +1277,21 @@ static int xe_bo_defrag_one(struct xe_device *xe, struct xe_bo *bo, xe_dbg(xe, "Defrag attempt on BO size=%zu: ret=%pe consumed=%llu\n", xe_bo_size(bo), ERR_PTR(ret), *consumed); - if (!ret && ttm_tt_is_beneficial_order_failed(bo->ttm.ttm)) + if (!ret && ttm_tt_is_beneficial_order_failed(bo->ttm.ttm)) { *needs_more = true; + xe_gt_stats_incr(xe_root_mmio_gt(xe), + XE_GT_STATS_ID_DEFRAG_PARTIAL_SUCCESS_COUNT, + 1); + } else { + xe_gt_stats_incr(xe_root_mmio_gt(xe), + ret ? XE_GT_STATS_ID_DEFRAG_FAILED_COUNT : + XE_GT_STATS_ID_DEFRAG_SUCCESS_COUNT, 1); + } + + if (!ret) + xe_gt_stats_incr(xe_root_mmio_gt(xe), + XE_GT_STATS_ID_DEFRAG_MB_MOVED, + *consumed >> 20); unlock: xe_bo_unlock(bo); diff --git a/drivers/gpu/drm/xe/xe_gt_stats.c b/drivers/gpu/drm/xe/xe_gt_stats.c index 789397514f3e..68e60d9500c8 100644 --- a/drivers/gpu/drm/xe/xe_gt_stats.c +++ b/drivers/gpu/drm/xe/xe_gt_stats.c @@ -154,6 +154,11 @@ static const char *const stat_description[__XE_GT_STATS_NUM_IDS] = { DEF_STAT_STR(PRL_2M_ENTRY_COUNT, "prl_2m_entry_count"), DEF_STAT_STR(PRL_ISSUED_COUNT, "prl_issued_count"), DEF_STAT_STR(PRL_ABORTED_COUNT, "prl_aborted_count"), + DEF_STAT_STR(DEFRAG_ADDED_COUNT, "defrag_added_count"), + DEF_STAT_STR(DEFRAG_SUCCESS_COUNT, "defrag_success_count"), + DEF_STAT_STR(DEFRAG_PARTIAL_SUCCESS_COUNT, "defrag_partial_success_count"), + DEF_STAT_STR(DEFRAG_FAILED_COUNT, "defrag_failed_count"), + DEF_STAT_STR(DEFRAG_MB_MOVED, "defrag_mb_moved"), }; /** diff --git a/drivers/gpu/drm/xe/xe_gt_stats_types.h b/drivers/gpu/drm/xe/xe_gt_stats_types.h index 425491bed6c4..c42b494390f8 100644 --- a/drivers/gpu/drm/xe/xe_gt_stats_types.h +++ b/drivers/gpu/drm/xe/xe_gt_stats_types.h @@ -122,6 +122,18 @@ * @XE_GT_STATS_ID_PRL_ABORTED_COUNT: Times the page reclaim process was * aborted. * + * @XE_GT_STATS_ID_DEFRAG_ADDED_COUNT: Times a buffer object was added to the + * page defragmentation list after being backed at a sub-optimal page order. + * @XE_GT_STATS_ID_DEFRAG_SUCCESS_COUNT: Times the defrag worker successfully + * re-backed a buffer object at the beneficial page order. + * @XE_GT_STATS_ID_DEFRAG_PARTIAL_SUCCESS_COUNT: Times the defrag worker + * partially re-backed a buffer object at the beneficial page order. + * @XE_GT_STATS_ID_DEFRAG_FAILED_COUNT: Times the defrag worker failed to + * re-back a buffer object at the beneficial page order. + * @XE_GT_STATS_ID_DEFRAG_MB_MOVED: Data (MiB) actually (re)allocated while + * re-backing buffer objects at the beneficial page order. Chunks borrowed + * from the old backing for free are not counted. + * * @__XE_GT_STATS_NUM_IDS: Number of valid IDs; not a real counter. * * See Documentation/gpu/xe/xe_gt_stats.rst. @@ -181,6 +193,11 @@ enum xe_gt_stats_id { XE_GT_STATS_ID_PRL_2M_ENTRY_COUNT, XE_GT_STATS_ID_PRL_ISSUED_COUNT, XE_GT_STATS_ID_PRL_ABORTED_COUNT, + XE_GT_STATS_ID_DEFRAG_ADDED_COUNT, + XE_GT_STATS_ID_DEFRAG_SUCCESS_COUNT, + XE_GT_STATS_ID_DEFRAG_PARTIAL_SUCCESS_COUNT, + XE_GT_STATS_ID_DEFRAG_FAILED_COUNT, + XE_GT_STATS_ID_DEFRAG_MB_MOVED, /* must be the last entry */ __XE_GT_STATS_NUM_IDS, }; -- 2.34.1