From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 76E25330305 for ; Sat, 11 Jul 2026 02:56:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783738606; cv=none; b=W51MgfvFtPgqWH7wTW0p1PEaTGjywcVTolOREVsSgTurxkA0oWRLBOZgYD//s86yfPVGhh7ePjj21DcI0kkL/zSqMX0JoWXBmME8qmW1X3hZPrNHkjLGcj8vchoWxXImEXg0z71kkjXCq16bVhExWzSVfMAfqR/aURF6t/+e1q8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783738606; c=relaxed/simple; bh=edwgj3Vi6WamRFMDYophPmVDcMuGxbGZxiBdM3N7/5M=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=qrJw+edhi7ByAoEx9DNowoVazpKZePoKcb+d59ENM1U2WOukZLpzJgxcK7xdgt4WYG2iRP9f0fsv7WsrBcvpXnX92BSPkXki8mjMPs2MtKDf6zuq77R2TZpYIHaijgB+wCm328IA4Kb1LZiUxWLWMwuJOIsbbo0lFwfcPiL/9RM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=LYwBFeAO; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="LYwBFeAO" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1783738604; x=1815274604; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=edwgj3Vi6WamRFMDYophPmVDcMuGxbGZxiBdM3N7/5M=; b=LYwBFeAOxEv6fmHl7voo+NrxQEY8E81VdMoLYo0G2wDOUppeFz0slnUL f+f96UfzOGuRLPu+koNf3yJQT8TkjYWKT7JCVtno8UkMrwSmZ4NfE4xHw rhVqIJ9UBwYUn5H8SznyVQ/qTa0LNCSF4+yWLOHZvd8z/fXBi9Oq1p+Gk mSXAEdY4m+XRGA667cr4efdfM4gCx5RJ+1PxFTlRi8hlYu+CH9H0Blkkz 5HuPeyU5XdLp7m7lsNJSP8NDt+Ppq4yc565q75bR+GKXefd/aHqGWCD1S hx1lAo9giUYFaerH3BdYK6qb1PXWVKk99PHZpeAeqzx/rh8c4CtKSppw1 g==; X-CSE-ConnectionGUID: yiv/nu4ZS3+pRnGgTa1K6Q== X-CSE-MsgGUID: L6762QieTPukMWtCv9LbSw== X-IronPort-AV: E=McAfee;i="6800,10657,11841"; a="101986350" X-IronPort-AV: E=Sophos;i="6.25,154,1779174000"; d="scan'208";a="101986350" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jul 2026 19:56:33 -0700 X-CSE-ConnectionGUID: bXXYBvgeT5y5f5ULHkOYIg== X-CSE-MsgGUID: Omud59+4SYCol8CRYMbwyQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,154,1779174000"; d="scan'208";a="256987783" Received: from gsse-cloud1.jf.intel.com ([10.54.39.91]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jul 2026 19:56:32 -0700 From: Matthew Brost To: intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: Carlos Santa , Ryan Neph , Christian Koenig , Huang Rui , Matthew Auld , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , linux-kernel@vger.kernel.org, =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= Subject: [PATCH v3 26/33] drm/xe: Add tracepoint for xe_gem_create_ioctl Date: Fri, 10 Jul 2026 19:56:12 -0700 Message-Id: <20260711025619.2540575-27-matthew.brost@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260711025619.2540575-1-matthew.brost@intel.com> References: <20260711025619.2540575-1-matthew.brost@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a xe_gem_create_ioctl tracepoint to help profile GEM creation, in particular the cost of populating a BO while holding the dma-resv lock versus the total IOCTL cost. This is useful for evaluating the out-of-lock preallocation path, which aims to shrink the time spent under the lock. The tracepoint records the BO size, the requested placement mask, the CPU caching mode, the VM asid (0 when no VM is bound), the total time spent in the IOCTL, and the time spent under the dma-resv lock (the xe_validation_guard region where the lock is held). The asid is captured at VM lookup time rather than at trace emission, since the VM reference is dropped before the tracepoint fires. Cc: Carlos Santa Cc: Ryan Neph Cc: Christian Koenig Cc: Huang Rui Cc: Matthew Auld Cc: Maarten Lankhorst Cc: Maxime Ripard Cc: Thomas Zimmermann Cc: David Airlie Cc: Simona Vetter Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Cc: Thomas Hellström Assisted-by: GitHub_Copilot:claude-opus-4.8 Signed-off-by: Matthew Brost --- v3: - Guard lock_ns against an unset lock_start and use div_u64() in the tracepoint (Sashiko) --- drivers/gpu/drm/xe/xe_bo.c | 17 +++++++++++++++++ drivers/gpu/drm/xe/xe_trace_bo.h | 31 +++++++++++++++++++++++++++++++ 2 files changed, 48 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c index a646a72122d4..caf5aa0bab53 100644 --- a/drivers/gpu/drm/xe/xe_bo.c +++ b/drivers/gpu/drm/xe/xe_bo.c @@ -3953,6 +3953,10 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data, bool have_prealloc = false; unsigned int bo_flags; u32 handle; + ktime_t ioctl_start = ktime_get(); + ktime_t lock_start = ktime_set(0, 0); + u64 lock_ns = 0; + u32 asid = 0; int err; if (XE_IOCTL_DBG(xe, args->pad[0] || args->pad[1] || args->pad[2]) || @@ -4031,6 +4035,7 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data, vm = xe_vm_lookup(xef, args->vm_id); if (XE_IOCTL_DBG(xe, !vm)) return -ENOENT; + asid = vm->usm.asid; } /* @@ -4100,6 +4105,10 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data, if (err) break; } + + if (lock_start == ktime_set(0, 0)) + lock_start = ktime_get(); + bo = xe_bo_create_user(xe, vm, args->size, args->cpu_caching, bo_flags, have_prealloc ? &prealloc : NULL, &exec); @@ -4110,6 +4119,8 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data, break; } } + if (lock_start != ktime_set(0, 0)) + lock_ns = ktime_to_ns(ktime_sub(ktime_get(), lock_start)); if (have_prealloc) ttm_pool_prealloc_fini(&xe->ttm.pool, &prealloc); if (err) @@ -4140,6 +4151,12 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data, if (vm) xe_vm_put(vm); + trace_xe_gem_create_ioctl(xe, args->size, args->placement, + args->cpu_caching, asid, + div_u64(ktime_to_ns(ktime_sub(ktime_get(), + ioctl_start)), 1000), + div_u64(lock_ns, 1000)); + return err; } diff --git a/drivers/gpu/drm/xe/xe_trace_bo.h b/drivers/gpu/drm/xe/xe_trace_bo.h index b159d37d39a1..63db37edadc2 100644 --- a/drivers/gpu/drm/xe/xe_trace_bo.h +++ b/drivers/gpu/drm/xe/xe_trace_bo.h @@ -144,6 +144,37 @@ TRACE_EVENT(xe_bo_defrag_one, __entry->ret) ); +TRACE_EVENT(xe_gem_create_ioctl, + TP_PROTO(struct xe_device *xe, u64 size, u32 placement, + u16 caching, u32 asid, u64 ioctl_us, u64 lock_us), + TP_ARGS(xe, size, placement, caching, asid, ioctl_us, lock_us), + + TP_STRUCT__entry( + __string(dev, dev_name(xe->drm.dev)) + __field(u64, size) + __field(u32, placement) + __field(u16, caching) + __field(u32, asid) + __field(u64, ioctl_us) + __field(u64, lock_us) + ), + + TP_fast_assign( + __assign_str(dev); + __entry->size = size; + __entry->placement = placement; + __entry->caching = caching; + __entry->asid = asid; + __entry->ioctl_us = ioctl_us; + __entry->lock_us = lock_us; + ), + + TP_printk("dev=%s, size=%llu, placement=0x%x, caching=%u, asid=%u, ioctl_us=%llu, lock_us=%llu", + __get_str(dev), __entry->size, __entry->placement, + __entry->caching, __entry->asid, __entry->ioctl_us, + __entry->lock_us) +); + DECLARE_EVENT_CLASS(xe_vma, TP_PROTO(struct xe_vma *vma), TP_ARGS(vma), -- 2.34.1