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Sat, 11 Jul 2026 05:57:51 -0700 (PDT) Received: from hu-mohs-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-313b9ca880fsm11185634eec.23.2026.07.11.05.57.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Jul 2026 05:57:51 -0700 (PDT) From: Mohammad Rafi Shaik To: Srinivas Kandagatla , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jaroslav Kysela , Takashi Iwai Cc: Krzysztof Kozlowski , linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 0/3] ASoC: qcom: qdsp6: Add MI2S clock control Date: Sat, 11 Jul 2026 18:27:37 +0530 Message-Id: <20260711125740.3083236-1-mohammad.rafi.shaik@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYwNzExMDEyNyBTYWx0ZWRfX2mXPD9LGB5D9 SgfC5UnwOrWuHe893D2jbTd382JJtOpOejuOsF1fsDNq+oO5UTSL7L0Y7whZHd9+3fw//1RqvW/ husFECkm9zIo6IQrc7trb6zdpRQlv6I= X-Proofpoint-GUID: lkTYkoYIQZHsTRLkyJvIzUj16Az6WAqO X-Proofpoint-ORIG-GUID: lkTYkoYIQZHsTRLkyJvIzUj16Az6WAqO X-Authority-Analysis: v=2.4 cv=dJSWXuZb c=1 sm=1 tr=0 ts=6a523dd1 cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=BifR_v5mCn8YSut0XsEA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzExMDEyNyBTYWx0ZWRfXxQ8JymhR3VsJ JQNMNotRHZ4Fie5d0OW1S77eNTLPucS8VMVRJ6TSP3Hcs5mIN9YYGooNaJUzEIWA201yQzVrNNP uRD2BWq+r9W6vQRz6lWIVQ6jN6Pf5PYv/NS6VyRrsV/2Lvkw6eMqItB66fO9IMZYZTLjPwUqzx7 USka/HKOOkg0RfXndHg6n1SzHkB4ta3NAGqEpfC41l/DA3kLOJEKXXQ/Knf8q0o2OB6woaWSbqr HBCwvH7JC/YtHh8/cOU2y/LgGfKk4OWjW4o692qu6AjWDiIDO4DIW0sHrldueDKfHcxJPBQge+O 9dIQJ6fWkeqOyxQjRE2rzyzciYLhV3e8C2pAirAe67ejwUnGOHs4ViJuR/j85fICZB6cwkGxNxi C18gsf6XWm9Hy/8ZbZIzWVihDGVxdBqK4hJIGul6xQ79BgfF3eyAe0XmF8H2Tqh6QhCRtlLiTrq Jdy1DGYOgmSNhVTstjQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-11_03,2026-07-10_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 suspectscore=0 phishscore=0 clxscore=1015 spamscore=0 priorityscore=1501 lowpriorityscore=0 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607110127 Add support for MI2S clock control within q6apm-lpass DAIs, including handling of MCLK, BCLK, and ECLK via the DAI .set_sysclk callback. Each MI2S port now retrieves its clock handles from the device tree, allowing per-port clock configuration and proper enable/disable during startup and shutdown. On platforms such as Monaco and Lemans, third-party codecs are hardware-wired to the SoC and do not always have an in-tree codec driver to manage their clocks. For these designs, clock line enablement must be driven from the platform side, and this series provides the necessary support for that. On QAIF-based platforms such as Shikra and Hawi, responsibility for voting I2S MCLK and bit-clock has moved from the DSP to the kernel. This series introduces the required device tree binding support to represent and vote for these clocks from the kernel. Enhances the sc8280xp machine driver to set the boards spacific configurations. --- Changes in v4: - Addressed review comments from Mark Brown. - Resolved all sashiko comments. - Link to v3: https://lore.kernel.org/all/20260706132009.1496321-1-mohammad.rafi.shaik@oss.qualcomm.com/ Changes in v3: - Addressed all review comments from Mark Brown. - Fixed OF node reference handling, clock configuration, and sample-rate handling issues as suggested by Mark Brown. - Added proper error checking for DAI configuration APIs as suggested by Mark Brown. - Added SENARY DAI support alongside MI2S DAIs as suggested by Val Packett. - Link to v2: https://lore.kernel.org/all/20260608023011.942228-1-mohammad.rafi.shaik@oss.qualcomm.com/ Changes in v2: - Added a detailed commit description to clearly explain the need for this change. - Improved the machine driver based on Neil’s feedback. - Link to v1: https://lore.kernel.org/all/20260309111300.2484262-1-mohammad.rafi.shaik@oss.qualcomm.com/ --- Mohammad Rafi Shaik (3): ASoC: dt-bindings: qcom,q6apm-lpass-dais: Document DAI subnode ASoC: qcom: q6apm-lpass-dais: Add MI2S clock control ASoC: qcom: sc8280xp: enhance machine driver for board-specific config .../bindings/sound/qcom,q6apm-lpass-dais.yaml | 58 ++++ sound/soc/qcom/qdsp6/q6apm-lpass-dais.c | 193 +++++++++++++- sound/soc/qcom/qdsp6/q6prm.h | 4 + sound/soc/qcom/sc8280xp.c | 252 ++++++++++++++++-- 4 files changed, 484 insertions(+), 23 deletions(-) base-commit: bee763d5f341b99cf472afeb508d4988f62a6ca1 -- 2.34.1