From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0908C379982 for ; Wed, 15 Jul 2026 14:11:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784124694; cv=none; b=kek3p/NcCJ6rjGEVnDEAp3bqG+6zZVnSv97cu6cotc7YjFfKXa8ztOKsp0sYovg8Vom8Ni1UB+tPqgbqnnFC3y20mEyKzYrqr7pzEjWfjcEkFWCzRusDB94acug+ezjLJgWeFApIND7XylAry+6Tr0wudbBt0jLAmgYN7LsG+gQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784124694; c=relaxed/simple; bh=1w4CgMY6hqW0RscoW+I4KpJUnvg/6sO9akTSyFxDnD0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HLb3rRbdzguf6tpKQH1Vv7IeNXA5PRuXDzfulYVcZoOQV1joNF+ePl0wVSEvTGqu+GkRD+K/2mBwVoS1cxeJYVsiS4+5jdYwW16A1y6QSWtHl+r/7dDAr+0tq4aZnsx5DRO8oGpPtecKFlkYaxtbRNRKCVjWDhqw/fOWlWjfIt8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=WFGbFU5E; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=UFpRY1pQ; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="WFGbFU5E"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="UFpRY1pQ" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66FE3WEP4006890 for ; Wed, 15 Jul 2026 14:11:32 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= etB4FVaixj6pjK5WgAj9fa3+p1eiXpv7Kfpsfz5keYg=; b=WFGbFU5E/T6Vss8N ol1kJDo1d9jSMHvwYK7ICKd/2KfaCcxeU5idiOBSPXTt4evn6wS4EUyIjyFb4RLs eE7adkS/BRKfqjN3vkaXLQdv+1xkcfaxY/Cm7Ykh9K7T8YrkYz9hq+k7UhEAcaGX j3yzI9HWD+zKOjj/C+w9cSPU2gdZxJoOur8doP0gB0dIP3DfWNPWVvrbKbsloS5b qoUobmCxRZ0xkpU5fTh/ihvIu9xtifKeAxhsmX2/KA/o0t5f/D+ZYzyjpa9i7xPg A317YMqMloKZ98RWYiWvTh4cGQlvhUXSl68qgJXr3ssLfzJzOfQ32Cpe3TT50unT RhyPTg== Received: from mail-pl1-f198.google.com (mail-pl1-f198.google.com [209.85.214.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4fe6529gh8-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 15 Jul 2026 14:11:32 +0000 (GMT) Received: by mail-pl1-f198.google.com with SMTP id d9443c01a7336-2cce870a060so101628965ad.2 for ; Wed, 15 Jul 2026 07:11:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1784124691; x=1784729491; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=etB4FVaixj6pjK5WgAj9fa3+p1eiXpv7Kfpsfz5keYg=; b=UFpRY1pQv80w75W/v5EEOCcmPnZ7IhanjMbZJ9pxidQo1Bzv3FsvSu+tmZsJxIHAfN bndjJFZf6u95UPvPH1+t0WrqY0P2IcF294zJSSMt6DWj2k9XPHZ9QhyMXUYL8B3ORNGv rjHaBWt0ky9mczgwut/fjT4NEpu/FpdKNHuG43BLwEgGOYTEE7FP19OGoqiFCbuS/ea+ 5UR8v856MbZIidwC69MB/V0ACMyOfiern3qcvm9GSBVaWyVvFYulk2ppJ4cjURi6Ta0D 7lxR9DIYDCjwOUUMVL7f1+ZWuXZvPeUdpdw1eO7z5TskjPJ06i/aVMyVrpbhvf1scOhn 6x/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784124691; x=1784729491; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=etB4FVaixj6pjK5WgAj9fa3+p1eiXpv7Kfpsfz5keYg=; b=l1ZQa99IbS/tlnYi+siHuURVLWzHQRE+WWPpN5Q9kIJK+EHpFzoAHtjc/ljtfvmr8E SctyIbOLUMQtOePjlDI6ao/XRQirPJvupA85ZYMbzOT20qxUvH905tsy2ElVQPX/Jn4o wGV3E/XFSFM+e95hx4/QXVQZL+wE2N/7uPvl6knnH5TEKoxk5NjhbZZhoGauUjUkjNLS 6QmbI6yIiWsQu97R/8ANq6jOnS71jiG18LaCMEPfSpmPgMlx/oRQwbJOVTb40ivm38L6 YtiStiomt13YlH2lMGnBATuHKrjwcnJegp89tZdFR7a3rCDC4bDp+mI9J2KdMFJrHQRs fJLA== X-Gm-Message-State: AOJu0Yzf25lJcLTon0oawo+z6Mha8Jv35Gvzttq9rAA2y8fzLK2dlz0U UR3eHFvf5V55XqrDFLHZjOElPDYwhhh3xbYCeOeg7eH+fYiTlbS8yK2f9p4hRh5u0TslmPaTa7k iU51MhqHYukBjvHH3tJZWrZBghmNkqm0Wor3HA4ZjGSGK6npeaT1Ca5Q/m0Uk6CKjXzQjaaPdX5 Q= X-Gm-Gg: AfdE7clCYvEzm4iP4S/buExA8I/QNiFyM8yVt8MDExGToVXFzCc5CnP6g6F9UcRSt1w JPI0D8w8/ikK6cogG7AB0y0Etgwhzl4Vu234b7Ef29kZRwkBnw7Td3Bd0Z1Mo3cdkfs4NywbWbY kSn2ec5t5qj16o5zMo2odu7FnH+WcUJhuR+L7PbXGZExp/AqEoAyb7UjRfO65QrGg5kA+xRepAx 3Nt05A8XMWZUQToYGWS3ps4NS6BcgkOChCUNjKvYgJNSFk6Z5aZZEPfuiVus5vSqC1XxloHeusu R/Pbtt/59u+LR0MBb13aQv+JHpWqD6o2rOkWQKn+ZtiOPOSi5/03925MQ/f9t+2pypVqG97HrJg 6uj74kN7vmYtImvA9o/R2OfBKj7xNErqMKTY0yHbGKPnJ X-Received: by 2002:a17:902:d48e:b0:2c6:8d95:fd6d with SMTP id d9443c01a7336-2cef136496amr67063555ad.21.1784124691273; Wed, 15 Jul 2026 07:11:31 -0700 (PDT) X-Received: by 2002:a17:902:d48e:b0:2c6:8d95:fd6d with SMTP id d9443c01a7336-2cef136496amr67062995ad.21.1784124690562; Wed, 15 Jul 2026 07:11:30 -0700 (PDT) Received: from hu-bvisredd-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf1070b68dsm2913215ad.79.2026.07.15.07.11.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jul 2026 07:11:29 -0700 (PDT) From: Vishnu Reddy Date: Wed, 15 Jul 2026 19:40:06 +0530 Subject: [PATCH v9 12/14] media: iris: Add platform data for glymur Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260715-glymur-v9-12-8cf2cbe12a07@oss.qualcomm.com> References: <20260715-glymur-v9-0-8cf2cbe12a07@oss.qualcomm.com> In-Reply-To: <20260715-glymur-v9-0-8cf2cbe12a07@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Dmitry Baryshkov , Mauro Carvalho Chehab , "Joerg Roedel (AMD)" , Will Deacon , Robin Murphy , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stanimir Varbanov , Bjorn Andersson , Konrad Dybcio Cc: linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, Vishnu Reddy X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784124602; l=8204; i=busanna.reddy@oss.qualcomm.com; s=20260216; h=from:subject:message-id; bh=1w4CgMY6hqW0RscoW+I4KpJUnvg/6sO9akTSyFxDnD0=; b=R5qk/6RNBdmvHYruD91KzWcpoIqOK2ct7dMvrRVi7BraHvG6bqrP5XrTV47f690jYHqUBGLLU LNlO9T7qsybB8gnZSDlWcFdCFr3PEw3A2O58UYHiv8BvHRz7Lqc0cGr X-Developer-Key: i=busanna.reddy@oss.qualcomm.com; a=ed25519; pk=9vmy9HahBKVAa+GBFj1yHVbz0ey/ucIs1hrlfx+qtok= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE1MDE0MSBTYWx0ZWRfX1cwtef0CdHxI 1FZBczDuUd0/R2tHuo3CoJpt8TEMaDyKzYwzIXH+zngo6PvCycdaEfrnldh9NFdksCnt0D1nzSK f8ndwu8aLTl5RXRKoP/pVMEH5Er/3QJjrwJ0hr2Fp8jqvJl1B95mnVtyhqTC/n/sTjsKuwNu9cz YY4WxZzL920sbZoJ0fR06JaL7LAhdnehUxua/bR/uZ6whX+Zdy7Q4yBdIhojUIAlNvLVoHMNIsN pXtJrwpy+Wk4VlUASSL1/Uy2GqUUSAUtRNzYShBfEC6zySjACPbghrDpdkvt2ZEzdHeQ25FvJir /cHXbYQyvRwJXvBxQNgWottx/bYKIzsG9FjrtIfZU8zkBDCSrRF6jspc6F35iutThT6SQwx9G4u Q7F1XCaviM0xQcb7WexBYyyNJ+gk61NON1QtlESrcwX0RIJwlhjjqeTBlRBYa+Htid55/65UBcO 1QqCPm8ftKbpezhwffg== X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE1MDE0MSBTYWx0ZWRfXwr/fJHinsWxe qc/RdzYXoO0vVX58Ru8hMIKAXf2HnqO1cv7hic8tNY/p41T+dFjnl147YZ2QET60PVESg0SucqR grnYiEsepSDpMum/RyBrKKXIUOHJ3pY= X-Authority-Analysis: v=2.4 cv=bKcm5v+Z c=1 sm=1 tr=0 ts=6a579514 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=0Xn_3AH55rwbdtokavwA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-ORIG-GUID: TPr1-EaPs8QmDLN66nHMjZ1ZpggCvxbT X-Proofpoint-GUID: TPr1-EaPs8QmDLN66nHMjZ1ZpggCvxbT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-15_03,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 spamscore=0 bulkscore=0 clxscore=1015 adultscore=0 malwarescore=0 impostorscore=0 suspectscore=0 priorityscore=1501 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607150141 On glymur platform, the iris core shares most properties with the iris core on the SM8550 platform. The major difference is that glymur integrates two codec cores (vcodec0 and vcodec1), while SM8550 has only one. Add glymur specific platform data, reusing SM8550 definitions wherever applicable. Reviewed-by: Vikash Garodia Reviewed-by: Dmitry Baryshkov Signed-off-by: Vishnu Reddy --- drivers/media/platform/qcom/iris/Makefile | 1 + .../platform/qcom/iris/iris_platform_common.h | 5 ++ .../platform/qcom/iris/iris_platform_glymur.c | 78 ++++++++++++++++++++++ .../platform/qcom/iris/iris_platform_glymur.h | 15 +++++ .../media/platform/qcom/iris/iris_platform_vpu3x.c | 35 ++++++++++ drivers/media/platform/qcom/iris/iris_probe.c | 4 ++ 6 files changed, 138 insertions(+) diff --git a/drivers/media/platform/qcom/iris/Makefile b/drivers/media/platform/qcom/iris/Makefile index 48e415cbc439..48570da56aa0 100644 --- a/drivers/media/platform/qcom/iris/Makefile +++ b/drivers/media/platform/qcom/iris/Makefile @@ -12,6 +12,7 @@ qcom-iris-objs += iris_buffer.o \ iris_hfi_gen2_packet.o \ iris_hfi_gen2_response.o \ iris_hfi_queue.o \ + iris_platform_glymur.o \ iris_platform_vpu2.o \ iris_platform_vpu3x.o \ iris_power.o \ diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h index 99f59b64f853..e182030bd537 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -39,6 +39,10 @@ struct iris_inst; #define MAX_HEVC_VBR_LAYER_HP_SLIDING_WINDOW 5 #define MAX_HIER_CODING_LAYER_GEN1 6 +#define VIDEO_REGION_SECURE_FW_REGION_ID 0 +#define VIDEO_REGION_VM0_SECURE_NP_ID 1 +#define VIDEO_REGION_VM0_NONSECURE_NP_ID 5 + enum stage_type { STAGE_1 = 1, STAGE_2 = 2, @@ -53,6 +57,7 @@ enum pipe_type { extern const struct iris_firmware_data iris_hfi_gen1_data; extern const struct iris_firmware_data iris_hfi_gen2_data; +extern const struct iris_platform_data glymur_data; extern const struct iris_platform_data qcs8300_data; extern const struct iris_platform_data sc7280_data; extern const struct iris_platform_data sm8250_data; diff --git a/drivers/media/platform/qcom/iris/iris_platform_glymur.c b/drivers/media/platform/qcom/iris/iris_platform_glymur.c new file mode 100644 index 000000000000..49edae8120fe --- /dev/null +++ b/drivers/media/platform/qcom/iris/iris_platform_glymur.c @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "iris_core.h" +#include "iris_platform_common.h" + +const struct iris_power_domain_data iris_glymur_ctrl_data = { + .pd_names = (const char *[]) { + "venus", + }, + .pd_cnt = 1, + .clk_names = (const char *[]) { + "core_iface", "core_freerun", "core", + }, + .clk_cnt = 3, +}; + +const struct iris_power_domain_data iris_glymur_vcodec_data[] = { + { + .pd_names = (const char *[]) { + "vcodec0", + }, + .pd_cnt = 1, + .clk_names = (const char *[]) { + "vcodec0_iface", "vcodec0_core_freerun", "vcodec0_core", + }, + .clk_cnt = 3, + }, + { + .pd_names = (const char *[]) { + "vcodec1", + }, + .pd_cnt = 1, + .clk_names = (const char *[]) { + "vcodec1_iface", "vcodec1_core_freerun", "vcodec1_core", + }, + .clk_cnt = 3, + }, +}; + +const char * const iris_glymur_clk_reset_table[] = { + "core_bus", + "vcodec0_bus", + "core", + "vcodec0_core", + "vcodec1_bus", + "vcodec1_core", +}; + +const char * const iris_glymur_opp_clk_table[] = { + "vcodec0_core", + "vcodec1_core", + "core", + NULL, +}; + +const struct tz_cp_config iris_glymur_tz_cp_config[] = { + { + .cp_start = VIDEO_REGION_SECURE_FW_REGION_ID, + .cp_size = 0, + .cp_nonpixel_start = 0, + .cp_nonpixel_size = 0x1000000, + }, + { + .cp_start = VIDEO_REGION_VM0_SECURE_NP_ID, + .cp_size = 0, + .cp_nonpixel_start = 0x1000000, + .cp_nonpixel_size = 0x24800000, + }, + { + .cp_start = VIDEO_REGION_VM0_NONSECURE_NP_ID, + .cp_size = 0, + .cp_nonpixel_start = 0x25800000, + .cp_nonpixel_size = 0xda600000, + }, +}; diff --git a/drivers/media/platform/qcom/iris/iris_platform_glymur.h b/drivers/media/platform/qcom/iris/iris_platform_glymur.h new file mode 100644 index 000000000000..9f2877ec9901 --- /dev/null +++ b/drivers/media/platform/qcom/iris/iris_platform_glymur.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef __IRIS_PLATFORM_GLYMUR_H__ +#define __IRIS_PLATFORM_GLYMUR_H__ + +extern const struct iris_power_domain_data iris_glymur_ctrl_data; +extern const struct iris_power_domain_data iris_glymur_vcodec_data[2]; +extern const char * const iris_glymur_clk_reset_table[6]; +extern const char * const iris_glymur_opp_clk_table[4]; +extern const struct tz_cp_config iris_glymur_tz_cp_config[3]; + +#endif /* __IRIS_PLATFORM_GLYMUR_H__ */ diff --git a/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c b/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c index 72dd23dbe02a..4049e134c3f0 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c +++ b/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c @@ -12,6 +12,7 @@ #include "iris_vpu_buffer.h" #include "iris_vpu_common.h" +#include "iris_platform_glymur.h" #include "iris_platform_qcs8300.h" #include "iris_platform_sm8550.h" #include "iris_platform_sm8650.h" @@ -48,6 +49,12 @@ static const struct iris_firmware_desc iris_vpu35_p4_gen2_desc = { .fwname = "qcom/vpu/vpu35_p4.mbn", }; +static const struct iris_firmware_desc iris_vpu36_p4_s7_gen2_desc = { + .firmware_data = &iris_hfi_gen2_data, + .get_vpu_buffer_size = iris_vpu_buf_size, + .fwname = "qcom/vpu/vpu36_p4_s7.mbn", +}; + static const u32 iris_fmts_vpu3x_dec[] = { [IRIS_FMT_H264] = V4L2_PIX_FMT_H264, [IRIS_FMT_HEVC] = V4L2_PIX_FMT_HEVC, @@ -83,6 +90,34 @@ static const struct tz_cp_config tz_cp_config_vpu3[] = { }, }; +const struct iris_platform_data glymur_data = { + .firmware_desc = &iris_vpu36_p4_s7_gen2_desc, + .vpu_ops = &iris_vpu36_ops, + .icc_tbl = iris_icc_info_vpu3x, + .icc_tbl_size = ARRAY_SIZE(iris_icc_info_vpu3x), + .clk_rst_tbl = iris_glymur_clk_reset_table, + .clk_rst_tbl_size = ARRAY_SIZE(iris_glymur_clk_reset_table), + .bw_tbl_dec = iris_bw_table_dec_vpu3x, + .bw_tbl_dec_size = ARRAY_SIZE(iris_bw_table_dec_vpu3x), + .ctrl_data = &iris_glymur_ctrl_data, + .vcodec_data = iris_glymur_vcodec_data, + .opp_pd_tbl = iris_opp_pd_table_vpu3x, + .opp_pd_tbl_size = ARRAY_SIZE(iris_opp_pd_table_vpu3x), + .opp_clk_tbl = iris_glymur_opp_clk_table, + /* Upper bound of DMA address range */ + .dma_mask = 0xffe00000 - 1, + .inst_iris_fmts = iris_fmts_vpu3x_dec, + .inst_iris_fmts_size = ARRAY_SIZE(iris_fmts_vpu3x_dec), + .inst_caps = &platform_inst_cap_sm8550, + .tz_cp_config_data = iris_glymur_tz_cp_config, + .tz_cp_config_data_size = ARRAY_SIZE(iris_glymur_tz_cp_config), + .num_vpp_pipe = 4, + .max_session_count = 16, + .num_cores = 2, + .max_core_mbpf = NUM_MBS_8K * 2, + .max_core_mbps = ((8192 * 4320) / 256) * 60, +}; + /* * Shares most of SM8550 data except: * - inst_caps to platform_inst_cap_qcs8300 diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/platform/qcom/iris/iris_probe.c index 9e96fa218dea..6ad553990c89 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -493,6 +493,10 @@ static const struct dev_pm_ops iris_pm_ops = { }; static const struct of_device_id iris_dt_match[] = { + { + .compatible = "qcom,glymur-iris", + .data = &glymur_data, + }, { .compatible = "qcom,qcs8300-iris", .data = &qcs8300_data, -- 2.34.1