From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-ed1-f74.google.com (mail-ed1-f74.google.com [209.85.208.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 42C6844CADF for ; Wed, 15 Jul 2026 11:59:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.74 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784116776; cv=none; b=thtRPlZ/sfvjesixPXd/mZB3cF5VFg336L1xWyUbe/ZV+VBtPFlhdKeuTASa2k+kZfk8uy7IkYdIim1CNKfYPV7DsGfcT1hfVI2HQzMmdQz8SjcblDcaRGFlhloRMg88/zc0zGMWeIHTdYYQdTkvMOrFETF4xC3KxeDfpoVWRXo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784116776; c=relaxed/simple; bh=avKKUR3ivX1o4eXWAvFx7D4B/bGHctrz504BKkAdasI=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=ZI8EC6yvMz1g3mdCXghj57k9YCaGzeHGJBKxthfAdiNu3dlwptQdmo1AboaOhJzNtvzaXHea7Q7AcPal6Ae8dTYxvqPtz8mpGlmbe9ZgC9VIGNwgvi3xSZN6atnHMB7j35CdfSimO+YSkZin61C9tjN9q1Qtit4Np9bU2AMAit8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--smostafa.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=n1m7OhFM; arc=none smtp.client-ip=209.85.208.74 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--smostafa.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="n1m7OhFM" Received: by mail-ed1-f74.google.com with SMTP id 4fb4d7f45d1cf-695f710d929so2516268a12.2 for ; Wed, 15 Jul 2026 04:59:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1784116768; x=1784721568; darn=vger.kernel.org; h=content-type:cc:to:from:subject:message-id:references:mime-version :in-reply-to:date:from:to:cc:subject:date:message-id:reply-to :content-type; bh=U+wIzMWf2cSB6EX/Jc8f2fGh3ASjjz6WosFQJCh8Jwc=; b=n1m7OhFMYzJ1n4M95KxVcch5aHdSsPCcpa2KTjmIqjfWdAAtrIYdBEX0rHzcq/Q0WL jGmKlW1NnteE5i1hjq7BfXbnwmN3CLK433OAkW/szhn6gDuZk44TyrO4uUf8XL/1TCEK K9rrCoSkA1liuHXqp6XJof0BA7oAalGXJhDHgUAYMHU0JHU+ontL0x2jlX1VXaOZJ9qp MEeRMSlNqFzfde3QAAPlV/CC7psJLiWj44PYMmW0AGW23C2M9Pf4UmXcqi63wArlxPPK iME2RXKi/kazwL0jmtDG75P3V8nQANMojS85TtwYa3ECNwBEIUdIDqGq7aP8WE7S0PVa OU3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784116768; x=1784721568; h=content-type:cc:to:from:subject:message-id:references:mime-version :in-reply-to:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to:content-type; bh=U+wIzMWf2cSB6EX/Jc8f2fGh3ASjjz6WosFQJCh8Jwc=; b=kP9qP2UKzR6i7srv+BD7hAQdbwry+2ppN8NgFRJydxpcSItMRtxhqg69xIG9BiLDEE 1OAyTdYM2hZD99CL/oD52IIlLpbvev8MH9uxVKB01LS8YHWMQv3X5ZC0sL2c6nX9Hui/ S5Znyk/aI+q8GWHdDyDPiAFUWT6kw2Sztno3YslPBCFq2fs84DDtD3hK+o1NAN2xU3g/ TgMhtViQRNV+R4cnlIo/nkAPOcmCsxCY3B95qpvxcgcqmgJ+xSkYH1eKArpKCEVXAAqu G3qk/uklUkkH76H85GBh087MM1Qx+jeyhmVXJnHt+OjheuaLv9NNZ7dmO0uddyfVo0EQ 8jNA== X-Forwarded-Encrypted: i=1; AHgh+RrAo9QErYpXgfjnO5HlBUAD/6NuzTbDwj8l1tpIMUerLz72+Qx2COSNp15UKK8W4CJIuiRRlsvyYzUQkA8=@vger.kernel.org X-Gm-Message-State: AOJu0YzObo6wbUrWUkvKKoxEjJhYl35LHsFPl880AjMFXI5yCQgmyfev T+DJdZBnfC1Yr+/BC7jrboLaguygQvI3m7ULcYwpR/EzEZtwEZH1iu3xmW1vrdH8egkPfX1Sqtv rf9NFY++GSgIAGQ== X-Received: from edou7.prod.google.com ([2002:aa7:d0c7:0:b0:69c:458d:1598]) (user=smostafa job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6402:1d4b:b0:69c:7754:f8b7 with SMTP id 4fb4d7f45d1cf-69c7754f940mr8902542a12.38.1784116767878; Wed, 15 Jul 2026 04:59:27 -0700 (PDT) Date: Wed, 15 Jul 2026 11:58:53 +0000 In-Reply-To: <20260715115906.2664882-1-smostafa@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260715115906.2664882-1-smostafa@google.com> X-Mailer: git-send-email 2.55.0.141.g00534a21ce-goog Message-ID: <20260715115906.2664882-13-smostafa@google.com> Subject: [PATCH v7 12/24] iommu/arm-smmu-v3-kvm: Probe SMMU HW From: Mostafa Saleh To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, iommu@lists.linux.dev Cc: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, joro@8bytes.org, jgg@ziepe.ca, mark.rutland@arm.com, qperret@google.com, tabba@google.com, vdonnefort@google.com, sebastianene@google.com, keirf@google.com, Mostafa Saleh Content-Type: text/plain; charset="UTF-8" Probe SMMU features from the IDR register space, most of the logic is common with the kernel. Signed-off-by: Mostafa Saleh --- .../iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c | 54 +++++++++++++++++++ .../iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h | 6 +++ 2 files changed, 60 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c index fee5db6c9c20..be5922d80184 100644 --- a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c @@ -10,6 +10,7 @@ #include #include "arm_smmu_v3.h" +#include "../arm-smmu-v3.h" size_t __ro_after_init kvm_hyp_arm_smmu_v3_count; struct hyp_arm_smmu_v3_device *kvm_hyp_arm_smmu_v3_smmus; @@ -26,6 +27,53 @@ static void smmu_deinit_device(struct hyp_arm_smmu_v3_device *smmu) smmu->base = NULL; } +/* + * Mini-probe and validation for the hypervisor. + */ +static int smmu_probe(struct hyp_arm_smmu_v3_device *smmu) +{ + u32 reg; + + /* Similar to the kernel, rely on firmware override. */ + if (!(smmu->features & ARM_SMMU_FEAT_COHERENCY)) + return -EINVAL; + + /* IDR0 */ + reg = readl_relaxed(smmu->base + ARM_SMMU_IDR0); + + smmu->features |= smmu_idr0_features(reg); + if (!(smmu->features & (ARM_SMMU_FEAT_TT_LE | ARM_SMMU_FEAT_TT_BE))) + return -ENXIO; + + reg = readl_relaxed(smmu->base + ARM_SMMU_IDR1); + if (reg & (IDR1_TABLES_PRESET | IDR1_QUEUES_PRESET | IDR1_REL)) + return -EINVAL; + + smmu->sid_bits = FIELD_GET(IDR1_SIDSIZE, reg); + /* Follows the kernel logic */ + if (smmu->sid_bits <= STRTAB_SPLIT) + smmu->features &= ~ARM_SMMU_FEAT_2_LVL_STRTAB; + + reg = readl_relaxed(smmu->base + ARM_SMMU_IDR3); + smmu->features |= smmu_idr3_features(reg); + + reg = readl_relaxed(smmu->base + ARM_SMMU_IDR5); + smmu->pgsize_bitmap = smmu_idr5_to_pgsize(reg); + + smmu->oas = smmu_idr5_to_oas(reg); + if (smmu->oas == 52) + smmu->pgsize_bitmap |= 1ULL << 42; + else if (!smmu->oas) + smmu->oas = 48; + + reg = readl_relaxed(smmu->base + ARM_SMMU_IIDR); + smmu->features = smmu_iidr_features(reg, smmu->features); + if (!(smmu->features & ARM_SMMU_FEAT_NESTING)) + return -ENXIO; + + return 0; +} + static int smmu_init_device(struct hyp_arm_smmu_v3_device *smmu) { unsigned long haddr; @@ -39,8 +87,14 @@ static int smmu_init_device(struct hyp_arm_smmu_v3_device *smmu) return ret; smmu->base = (void __iomem *)haddr; + ret = smmu_probe(smmu); + if (ret) + goto out_ret; return 0; +out_ret: + smmu_deinit_device(smmu); + return ret; } /* Called while is the host is still trusted. */ diff --git a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h index 744ee2b7f0b4..82b84673e85b 100644 --- a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h @@ -12,12 +12,18 @@ * * Other members are filled and used at runtime by the SMMU driver. * @base Virtual address of SMMU registers + * @oas PA size + * @pgsize_bitmap Supported page sizes + * @sid_bits Max number of SID bits supported */ struct hyp_arm_smmu_v3_device { phys_addr_t mmio_addr; size_t mmio_size; void __iomem *base; u32 features; + unsigned long oas; + unsigned long pgsize_bitmap; + unsigned int sid_bits; }; extern size_t kvm_nvhe_sym(kvm_hyp_arm_smmu_v3_count); -- 2.55.0.141.g00534a21ce-goog