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These clocks are now handled centrally as global CAMSS PM clocks and are automatically enabled when CAMSS is runtime resumed. This avoids redundant clock references in individual subdevices and ensures consistent clock management across the CAMSS pipeline. Signed-off-by: Loic Poulain --- drivers/media/platform/qcom/camss/camss.c | 38 ++++++++++--------------------- 1 file changed, 12 insertions(+), 26 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 04b5601eb0b53110ce1b94248323dad1c08da9ca..1e97b0b7ec463f1fa2615704d09ce465a8964176 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -688,10 +688,8 @@ static const struct camss_subdev_resources csiphy_res_2290[] = { { .supply = "vdd-csiphy-1p2", .init_load_uA = 26700 }, { .supply = "vdd-csiphy-1p8", .init_load_uA = 2600 } }, - .clock = { "top_ahb", "ahb", "csiphy0", "csiphy0_timer" }, - .clock_rate = { { 0 }, - { 0 }, - { 240000000, 341330000, 384000000 }, + .clock = { "csiphy0", "csiphy0_timer" }, + .clock_rate = { { 240000000, 341330000, 384000000 }, { 100000000, 200000000, 268800000 } }, .reg = { "csiphy0" }, .interrupt = { "csiphy0" }, @@ -708,10 +706,8 @@ static const struct camss_subdev_resources csiphy_res_2290[] = { { .supply = "vdd-csiphy-1p2", .init_load_uA = 26700 }, { .supply = "vdd-csiphy-1p8", .init_load_uA = 2600 } }, - .clock = { "top_ahb", "ahb", "csiphy1", "csiphy1_timer" }, - .clock_rate = { { 0 }, - { 0 }, - { 240000000, 341330000, 384000000 }, + .clock = { "csiphy1", "csiphy1_timer" }, + .clock_rate = { { 240000000, 341330000, 384000000 }, { 100000000, 200000000, 268800000 } }, .reg = { "csiphy1" }, .interrupt = { "csiphy1" }, @@ -727,10 +723,8 @@ static const struct camss_subdev_resources csid_res_2290[] = { /* CSID0 */ { .regulators = {}, - .clock = { "top_ahb", "ahb", "csi0", "vfe0_cphy_rx", "vfe0" }, - .clock_rate = { { 0 }, - { 0 }, - { 192000000, 240000000, 384000000, 426400000 }, + .clock = { "csi0", "vfe0_cphy_rx", "vfe0" }, + .clock_rate = { { 192000000, 240000000, 384000000, 426400000 }, { 0 }, { 0 } }, .reg = { "csid0" }, @@ -745,10 +739,8 @@ static const struct camss_subdev_resources csid_res_2290[] = { /* CSID1 */ { .regulators = {}, - .clock = { "top_ahb", "ahb", "csi1", "vfe1_cphy_rx", "vfe1" }, - .clock_rate = { { 0 }, - { 0 }, - { 192000000, 240000000, 384000000, 426400000 }, + .clock = { "csi1", "vfe1_cphy_rx", "vfe1" }, + .clock_rate = { { 192000000, 240000000, 384000000, 426400000 }, { 0 }, { 0 } }, .reg = { "csid1" }, @@ -765,11 +757,8 @@ static const struct camss_subdev_resources vfe_res_2290[] = { /* VFE0 */ { .regulators = {}, - .clock = { "top_ahb", "ahb", "axi", "vfe0", "camnoc_rt_axi", "camnoc_nrt_axi" }, - .clock_rate = { { 0 }, - { 0 }, - { 0 }, - { 19200000, 153600000, 192000000, 256000000, 384000000, 460800000 }, + .clock = { "vfe0", "camnoc_rt_axi", "camnoc_nrt_axi" }, + .clock_rate = { { 19200000, 153600000, 192000000, 256000000, 384000000, 460800000 }, { 0 }, { 0 }, }, .reg = { "vfe0" }, @@ -785,11 +774,8 @@ static const struct camss_subdev_resources vfe_res_2290[] = { /* VFE1 */ { .regulators = {}, - .clock = { "top_ahb", "ahb", "axi", "vfe1", "camnoc_rt_axi", "camnoc_nrt_axi" }, - .clock_rate = { { 0 }, - { 0 }, - { 0 }, - { 19200000, 153600000, 192000000, 256000000, 384000000, 460800000 }, + .clock = { "vfe1", "camnoc_rt_axi", "camnoc_nrt_axi" }, + .clock_rate = { { 19200000, 153600000, 192000000, 256000000, 384000000, 460800000 }, { 0 }, { 0 }, }, .reg = { "vfe1" }, -- 2.34.1