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Miller" , Stanimir Varbanov , Eneas U de Queiroz , Kuldeep Singh , Eric Biggers Cc: linux-crypto@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, brgl@kernel.org, Bartosz Golaszewski , stable@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3299; i=bartosz.golaszewski@oss.qualcomm.com; h=from:subject:message-id; bh=0wfULYDcviuc8Q42MEg50uyXBEFkn0s1U0Ju00N6IK8=; b=owEBbQKS/ZANAwAKAQWdLsv/NoTDAcsmYgBqWlAKW2UNv3U6nFiQE9kWWZwPOg5OFCqB9H1H4 cBzMP9CI7SJAjMEAAEKAB0WIQSR5RMt5bVGHXuiZfwFnS7L/zaEwwUCalpQCgAKCRAFnS7L/zaE w+sREACcjpz5KVQ8zguYq9FygEPKgP9grRojVsv224aOD2JCnjYLqrHSuwud7NnoRKPDTZMfeoQ cKk22j+o8dCtLgMy1qq3CWCac+iOzM87yYyHVO1Lf9NSToohTC38lX3vPzJ6oCEBLCMXFa7/EhQ 7qf6oIaqbu2hELSsijr5qj1rIMefDPN7xbnUNBkBn9kccfmEX17eKbR4Yv+Y0Y0vpQB1Ssh4wW3 K6OpBotd4jZjAi2Sq/nogkPJohCgFeqe6vhJ2uf9gL6Fb1Xio5VQK2vof0//teRhxnYDSV3KWhC /3TLW7IIZbkKGlAyDzsmqtFhKfPie6jjBsQkQp0t4qKblQISsbBnxgOah0bgZmsUUF4N5iDolxJ yccUaf/b4WsUDytJLjgU8UdXbPKx8msAuB1L6sT49orf1E3qsX5A5lqAl5qhex8yjAf8JA5BRUk pNpjdkDOYRvOqCyvuWBsyxSVQJy1p6Sb/DcZm7NNOD8fWNtkJayB1ARMb8O2MwKVhddxbvT8gxL ffBs7wZMvkt3HabS6U3DXfHS/OWNwSNZfl4VSVklzS6aEJYwLbTyFb+HC5lHYMp/5bAN8aIbZws G3Nz5o3u16yQFxaALoXhGSW4Eqb40/UW3uR3baHBk0r8E22gO5x0uaPxjm0/9pT37p7WdurggxX pAdgi7OlDS4ugOg== X-Developer-Key: i=bartosz.golaszewski@oss.qualcomm.com; a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE3MDE2MiBTYWx0ZWRfX2urTsVRvuT0S OR1Ex5FJy9BgC0kEkvNGqCgkxk3dXCikX4Xo4MaqqMQWpBpMxlvwPqxtY9hv6Kk62QZdcQ834u+ 98M38I4ETbYfi5BdmkWoBts+cGDd7nw84ozxwH2lX8sKex70I7/TDGtwFlAONz5vzgVVZ+YGYHa brZOrlH9bf+ooMPn0TyEY+T7zfnIu3ZEtXDtCPJBD6TVbDzI4KPyME4gYB8/HxaSbJIQ5hht4YI VUe9eywO9ERKjhVmiAj8vRtttunae/ek7sELPwAsMZuG0hLnEB1Q0yzbvVR2RNHuybLg0eH5YLT CHI9TigA4lUYilGfhjR01nN5WMenT/kGslo99qPJCT74u4GEJxgJheJWmRxFJnMAkxzEZAWZi3j 8mKaEwfxe7T2mcarrwOn9abi5TC+J83RPsxItplRKz52H0F/Kb4n7KRVKM27QYQdPBInU28d1GB 6iJgFHi7ItAHiOW5HLg== X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE3MDE2MiBTYWx0ZWRfX9Q3PRyTNHuwP Cqk9J5F+JEncuB6cy9fw1jLXVoFaisr34Wh7s6QByqME3ifbX9N4Oviyajdg3hFAyCtTnwJCy3m RRwqc1qDlv/lU1zBeoUmWjK7JreYQ+g= X-Authority-Analysis: v=2.4 cv=YeWNIQRf c=1 sm=1 tr=0 ts=6a5a5019 cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=Y2NcAOke46LZopEJyX0A:9 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 X-Proofpoint-GUID: Jg39HrF_-38eGaB9BydQUCrCrHZZusjQ X-Proofpoint-ORIG-GUID: Jg39HrF_-38eGaB9BydQUCrCrHZZusjQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-17_04,2026-07-17_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 spamscore=0 lowpriorityscore=0 adultscore=0 phishscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607170162 From: Kuldeep Singh In CTR mode, the IV acts as the initial counter block. APer NIST SP 800-38A, after a CTR mode operation the next unused counter value is: IV_next = IV_in + ceil(cryptlen / AES_BLOCK_SIZE) The skcipher requires req->iv to hold this updated counter on completion, ensuring chained requests produce correct results. Referring to Crypto6.0 documentation, Section 2.2.5 says: "The count value increments automatically once per block of data (in AES, a block is 16 bytes) based on the value in the CRYPTO_ENCR_CNTR_MASK registers." QCE increments internal counter register once per full 16-byte block(for ctr-aes) is processed. In case of partial request length, the hardware uses the current counter to generate keystreams but does not increment the counter register afterwards. So the counter value written in CRYPTO_ENCR_CNTRn_IVn later once read by software is one less than the expected value. Crypto selftest framework capture this scenario with test vector 4 comprising of a 499-byte payload (31 full blocks + 3 partial bytes). Error: [ 5.606169] alg: skcipher: ctr-aes-qce encryption test failed (wrong output IV) on test vector 4, cfg="in-place (one sglist)" [ 5.606176] 00000000: e7 82 1d b8 53 11 ac 47 e2 7d 18 d6 71 0c a7 61 [ 5.606192] alg: self-tests for ctr(aes) using ctr-aes-qce failed (rc=-22) Expected iv_out: 0x62 (iv_in + 32) Obtained iv_out: 0x61 (iv_in + 31, partial block not counted) To fix this, just increase the counter value for partial block requests by 1 and for the full block size requests, don't take any action as expected value is already returned by the hardware. Cc: stable@vger.kernel.org Fixes: 3e806a12d10a ("crypto: qce - update the skcipher IV") Signed-off-by: Kuldeep Singh Tested-by: Kuldeep Singh Signed-off-by: Bartosz Golaszewski --- drivers/crypto/qce/skcipher.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/qce/skcipher.c b/drivers/crypto/qce/skcipher.c index e1f69057607fac36e8b4bdb5dd9e62a2aabe5f50..35ddbe03cfcd75db7599a5754e4ff978f3528105 100644 --- a/drivers/crypto/qce/skcipher.c +++ b/drivers/crypto/qce/skcipher.c @@ -33,6 +33,7 @@ static void qce_skcipher_done(void *data) struct qce_device *qce = tmpl->qce; struct qce_result_dump *result_buf = qce->dma.result_buf; enum dma_data_direction dir_src, dir_dst; + unsigned int blocks; u32 status; int error; bool diff_dst; @@ -56,7 +57,21 @@ static void qce_skcipher_done(void *data) if (error < 0) dev_dbg(qce->dev, "skcipher operation error (%x)\n", status); - memcpy(rctx->iv, result_buf->encr_cntr_iv, rctx->ivsize); + if (IS_CTR(rctx->flags)) { + /* + * QCE hardware does not increment the counter for a partial + * final block. Increment it in software so that iv_out + * reflects the correct next counter value expected by the CTR + * mode. + */ + blocks = DIV_ROUND_UP(rctx->cryptlen, AES_BLOCK_SIZE); + + while (blocks--) + crypto_inc(rctx->iv, rctx->ivsize); + } else { + memcpy(rctx->iv, result_buf->encr_cntr_iv, rctx->ivsize); + } + qce->async_req_done(tmpl->qce, error); } -- 2.47.3