From: Sudeep Holla <sudeep.holla@kernel.org>
To: linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Sudeep Holla <sudeep.holla@kernel.org>,
acpica-devel@lists.linux.dev,
"Rafael J . Wysocki" <rafael@kernel.org>,
Saket Dumbre <saket.dumbre@intel.com>
Subject: [PATCH 1/4] ACPICA: Fix PCC OperationRegion command offsets
Date: Fri, 17 Jul 2026 09:10:02 +0100 [thread overview]
Message-ID: <20260717081005.470013-2-sudeep.holla@kernel.org> (raw)
In-Reply-To: <20260717081005.470013-1-sudeep.holla@kernel.org>
ACPI 6.3, section 5.5.2.4.7.3, states that the PCC Operation
Region is associated with the region of shared memory that follows the
PCC signature.
The generic and extended PCC shared memory layouts include the 4-byte
signature at offset 0, so their raw shared memory COMMAND fields are at
offsets 4 and 12 respectively. Since AML field offsets for the PCC
OperationRegion are relative to the region after that signature, ACPICA
must look for those COMMAND fields at OperationRegion offsets 0 and 8.
Adjust the generic and master subspace command checks to use those
OperationRegion-relative offsets. Otherwise writes to the COMMAND field
can fail to invoke the PCC address space handler at the offset described
by the PCC OperationRegion definition.
Fixes: aa6ec56b574d ("ACPICA: ACPI 6.3: add PCC operation region support for AML interpreter")
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
---
drivers/acpi/acpica/exfield.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/acpi/acpica/exfield.c b/drivers/acpi/acpica/exfield.c
index 9a55524ed8f4..a7fac63938b3 100644
--- a/drivers/acpi/acpica/exfield.c
+++ b/drivers/acpi/acpica/exfield.c
@@ -45,12 +45,13 @@ static const u8 acpi_protocol_lengths[] = {
/*
* The following macros determine a given offset is a COMD field.
- * According to the specification, generic subspaces (types 0-2) contains a
- * 2-byte COMD field at offset 4 and master subspaces (type 3) contains a 4-byte
- * COMD field starting at offset 12.
+ * According to the specification, the PCC OperationRegion begins after
+ * the PCC signature. The raw shared memory COMD offsets of 4 for generic
+ * subspaces (types 0-2) and 12 for master subspaces (type 3) therefore
+ * appear at OperationRegion offsets 0 and 8.
*/
-#define GENERIC_SUBSPACE_COMMAND(a) (4 == a || a == 5)
-#define MASTER_SUBSPACE_COMMAND(a) (12 <= a && a <= 15)
+#define GENERIC_SUBSPACE_COMMAND(a) ((a) < 2)
+#define MASTER_SUBSPACE_COMMAND(a) (((a) - 8) < 4)
/*******************************************************************************
*
--
2.43.0
next prev parent reply other threads:[~2026-07-17 8:10 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-17 8:10 [PATCH 0/4] ACPI/PCC: Correct PCC OperationRegion handling Sudeep Holla
2026-07-17 8:10 ` Sudeep Holla [this message]
2026-07-17 8:10 ` [PATCH 2/4] ACPI: PCC: Preserve shared memory signature in OpRegion handler Sudeep Holla
2026-07-17 8:10 ` [PATCH 3/4] ACPI: PCC: Free channel on OpRegion deactivation Sudeep Holla
2026-07-17 8:10 ` [PATCH 4/4] ACPI: PCC: Cache OpRegion command timeout Sudeep Holla
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