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([109.52.116.145]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-69e6ffbab34sm931684a12.14.2026.07.17.08.14.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jul 2026 08:14:55 -0700 (PDT) From: Luca Leonardo Scorcia To: linux-mediatek@lists.infradead.org Cc: Luca Leonardo Scorcia , Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 0/7] Properly describe mt8167 watchdog and mmsys resets Date: Fri, 17 Jul 2026 17:11:07 +0200 Message-ID: <20260717151134.678839-1-l.scorcia@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Currently mt8167 inherits its watchdog from the included mt8516 dtsi, which in turn falls back on mt6589-wdt. However according to the data sheet mt8167 has 15 sw resets instead of 12, and the reset bits are different from mt6589. In the first two patches we improve the description of the resets for mt6589 with values obtained from Android sources. Then we introduce a dedicated mediatek,mt8167-wdt compatible for the watchdog driver that describes correctly this SoC's resets. Also while we're touching the bindings reset header, we add constants for the MMSYS resets. In the 6th patch we add a node for the mt8167 watchdog referring to the new compatible in the SoC dtsi. In the last patch, we define the mmsys reset table for the SoC. According to the datasheet, there are 28 mmsys reset bits divided across two adjacent registers. Luca Leonardo Scorcia (7): dt-bindings: reset: Add MT6589 toprgu reset IDs watchdog: mediatek: Add wdt/toprgu resets for MT6589 dt-bindings: watchdog: Add compatible for MediaTek mt8167 dt-bindings: reset: Add reset controller constants for mt8167 watchdog: mediatek: Add support for mt8167 TOPRGU/WDT arm64: dts: mt8167: Properly describe the SoC watchdog soc: mediatek: mtk-mmsys: Add resets for mt8167 .../bindings/watchdog/mediatek,mtk-wdt.yaml | 1 + arch/arm64/boot/dts/mediatek/mt8167.dtsi | 7 +++ drivers/soc/mediatek/mt8167-mmsys.h | 40 ++++++++++++++ drivers/soc/mediatek/mtk-mmsys.c | 3 ++ drivers/watchdog/mtk_wdt.c | 13 ++++- .../reset/mediatek,mt6589-resets.h | 24 +++++++++ .../reset/mediatek,mt8167-resets.h | 53 +++++++++++++++++++ 7 files changed, 140 insertions(+), 1 deletion(-) create mode 100644 include/dt-bindings/reset/mediatek,mt6589-resets.h create mode 100644 include/dt-bindings/reset/mediatek,mt8167-resets.h -- 2.43.0