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Sun, 19 Jul 2026 12:40:15 -0700 (PDT) From: Rosen Penev To: linux-edac@vger.kernel.org Cc: Frank Li , Borislav Petkov , Tony Luck , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , York Sun , imx@lists.linux.dev (open list:EDAC-FSL_DDR), linux-kernel@vger.kernel.org (open list), llvm@lists.linux.dev (open list:CLANG/LLVM BUILD SUPPORT:Keyword:\b(?i:clang|llvm)\b) Subject: [PATCH 1/2] EDAC: fsl_ddr: restore MC error registers on probe failure Date: Sun, 19 Jul 2026 12:40:08 -0700 Message-ID: <20260719194009.117532-2-rosenp@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260719194009.117532-1-rosenp@gmail.com> References: <20260719194009.117532-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit fsl_mc_err_probe() clears FSL_MC_ERR_DISABLE and, in EDAC_OPSTATE_INT mode, sets FSL_MC_ERR_INT_EN to enable error reporting. If a later initialization step fails and jumps to the err/err2 labels, the cleanup only frees driver memory and does not restore these hardware registers. This leaves the memory controller configured to generate interrupts while no handler is successfully registered, which can cause an unhandled interrupt storm on the shared IRQ line. Restore FSL_MC_ERR_DISABLE, FSL_MC_ERR_INT_EN and the SBE threshold in both error paths. Initialize the orig_ddr_err_disable/orig_ddr_err_sbe save fields up front so the error paths are safe even when they are reached before the INT block populates them. Built for arm64 (defconfig + CONFIG_EDAC_FSL_DDR) with LLVM=1; drivers/edac/fsl_ddr_edac.o compiles cleanly. Fixes: ea2eb9a8b620 ("EDAC, fsl-ddr: Separate FSL DDR driver from MPC85xx") Assisted-by: opencode:hy3-free Signed-off-by: Rosen Penev --- drivers/edac/fsl_ddr_edac.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/edac/fsl_ddr_edac.c b/drivers/edac/fsl_ddr_edac.c index b27dff96aeb6..b1e6e177b088 100644 --- a/drivers/edac/fsl_ddr_edac.c +++ b/drivers/edac/fsl_ddr_edac.c @@ -518,6 +518,8 @@ int fsl_mc_err_probe(struct platform_device *op) pdata = mci->pvt_info; pdata->name = "fsl_mc_err"; + pdata->orig_ddr_err_disable = 0; + pdata->orig_ddr_err_sbe = 0; mci->pdev = &op->dev; pdata->edac_idx = edac_mc_idx++; dev_set_drvdata(mci->pdev, mci); @@ -645,7 +647,11 @@ int fsl_mc_err_probe(struct platform_device *op) err2: edac_mc_del_mc(&op->dev); + ddr_out32(pdata, FSL_MC_ERR_INT_EN, 0); err: + ddr_out32(pdata, FSL_MC_ERR_DISABLE, + pdata->orig_ddr_err_disable); + ddr_out32(pdata, FSL_MC_ERR_SBE, pdata->orig_ddr_err_sbe); devres_release_group(&op->dev, fsl_mc_err_probe); edac_mc_free(mci); return res; -- 2.55.0