From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C53230566F; Mon, 20 Jul 2026 10:05:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784541908; cv=none; b=eOW6QfYeVuf57XBe8095rlFsA6ge/xorG001uWb33ueZzoGzFb100M2idRQG1VQ0ehX0zZ1iTZyPN+POcW2lVd5WtBJMtKZPgWffNHYfQ2G4zrAXfRyNDjKKzmN1Yi1daBdjlMXHX1mtk3l+LnL4pBxoTnUpmnyu0QbEXKD+yzQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784541908; c=relaxed/simple; bh=fUUtXLDjBk6CCgOqNBHxohDsqafdXykxd3de6nmxpT8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=CN5kJRyWnoyj1eWcrZmBIdw2Gs42FB5jQALZkA3NcZ6dmXCBiqpcCgIjFxr/5In+tesnoce9mVf9D5jzj/znAC0zP9zJ6J1ptoB6ctp5ffkRZ96sWaIT7ttsgTCHOn4ucu+csjUgcAUIuoUY2LSEhLAUeWhE7C9bObFOzz3HJeM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=O5UlQ7CN; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="O5UlQ7CN" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1784541897; bh=fUUtXLDjBk6CCgOqNBHxohDsqafdXykxd3de6nmxpT8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=O5UlQ7CN0y2tt8ts4qtMJhWQaYSfbpnqlcgQuPeKOxNflqQto7UTTA8LIb1BfDwwW gCoKjUk34QqLe5YWXe7XfIZyNnuBtwQz+CDIAt+TGTzQ9KhcACsI7xh4hj0/imvPGx LtZL74PEm1Fdk0KuHms7mnQe41KbBCxtGMPmkEmrBZpWDQfFXUD6VMvvukMY901+kw PicvMDwbsIaLtaSOFvDexMEC9qxufvjROeV3pdEio+w0OdaTmNJGp5fz84bA+Xggtc lgBWbeoFacF2IauYE67wCgvt+QdVlL9B37JXHj8s4BAxc1hc3wJtH/uYRUUJddcbiW vX0u6HzqDDgZA== Received: from yukiji.home (unknown [100.64.0.131]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: laeyraud) by bali.collaboradmins.com (Postfix) with ESMTPSA id D780A17E0D9D; Mon, 20 Jul 2026 12:04:56 +0200 (CEST) From: Louis-Alexis Eyraud Date: Mon, 20 Jul 2026 12:04:12 +0200 Subject: [PATCH v3 02/18] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8192 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260720-mt8189-clocks-system-base-v3-2-8e6d99ab3ad2@collabora.com> References: <20260720-mt8189-clocks-system-base-v3-0-8e6d99ab3ad2@collabora.com> In-Reply-To: <20260720-mt8189-clocks-system-base-v3-0-8e6d99ab3ad2@collabora.com> To: Michael Turquette , Stephen Boyd , Brian Masney , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Jie Chen , Philipp Zabel , Edward-JW Yang , Richard Cochran , Chen-Yu Tsai Cc: kernel@collabora.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, netdev@vger.kernel.org, Conor Dooley , Louis-Alexis Eyraud X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784541894; l=1753; i=louisalexis.eyraud@collabora.com; s=20250113; h=from:subject:message-id; bh=fUUtXLDjBk6CCgOqNBHxohDsqafdXykxd3de6nmxpT8=; b=+WHbDku90aAuP59lLo8pKTB2Fkl7ZDEJQ+BiW+mtl9kB7KXPf4wKtBRl7aZPsBU3CyXZKudeG f686Abeiqq6DilW+wIDcC1f3UFuyH9yRUbStEd5WzA7xQs86QA8CW4G X-Developer-Key: i=louisalexis.eyraud@collabora.com; a=ed25519; pk=CHFBDB2Kqh4EHc6JIqFn69GhxJJAzc0Zr4e8QxtumuM= Both MT8192 clock controllers dt-bindings (clock and sys-clock) document the '#clock-cells' property but do not enforce it as required property. As clock provider nodes should define this property in devicetrees, add it to the required property list in both its dt-bindings files. Fixes: 4a803990aeb1 ("dt-bindings: ARM: Mediatek: Add new document bindings of MT8192 clock") Acked-by: Conor Dooley Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Louis-Alexis Eyraud --- Documentation/devicetree/bindings/clock/mediatek,mt8192-clock.yaml | 1 + Documentation/devicetree/bindings/clock/mediatek,mt8192-sys-clock.yaml | 1 + 2 files changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8192-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8192-clock.yaml index b8d690e28bdc..65e4c2fddf5b 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,mt8192-clock.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8192-clock.yaml @@ -46,6 +46,7 @@ properties: required: - compatible - reg + - '#clock-cells' additionalProperties: false diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8192-sys-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8192-sys-clock.yaml index bf8c9aacdf1e..0ebd0d60e2f6 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,mt8192-sys-clock.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8192-sys-clock.yaml @@ -35,6 +35,7 @@ properties: required: - compatible - reg + - '#clock-cells' additionalProperties: false -- 2.55.0