From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2AD2F434E21 for ; Mon, 20 Jul 2026 15:08:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784560096; cv=none; b=rM8wixfo1HAloQXTv5eIq8dJl38AQ+fAL+Ee9Xil3yc9GIDaOvnjp7qS8+lvni1dyras/zn8KfT/L1xHEww47Y0oiaIrezv6JRsmq2j2SLvtC7jWVI64rXV4ZcNnsgyDPH7kv/vuH3lL+PpmZCeE6t2OQ3KgGl5RAHhjB5em58U= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784560096; c=relaxed/simple; bh=SJjTUHlMNzbHbPh8w/YzLyeDEVKL94o5fz6ILL/JKb0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ak4fnLb8xEPk+G5xRl0yb0l9P83NU+SeC2v6SGIj/RSkUGcHou5UGmuR5dWtgw+UgiW4/at/0dewQoDl1C16EpqWqTDDvKQ7bjmlUEcmuA587VRs3Pvvw9eMLQJZ/fhWPrJy/Mu6cpWLRS99JSxN9RnS9RQ/aD0YMPRVJUUNU6k= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=P/H2T4UN; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=EQhu4NRM; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="P/H2T4UN"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="EQhu4NRM" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66KDqNBH2836897 for ; Mon, 20 Jul 2026 15:08:14 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= gv/Mc9YDpHV0q4uPifKaSiGmnLmBmYxDgZHdP91zT1w=; b=P/H2T4UNdai7dGPg xo2Nz2ouGJ/6JYJmvQvi8o485UHwhToTkOUfB987jlyY8SNwCo8cb5wYr1JfSDX8 BrjsiKOBXmyb+JOunPaWL4jDXcvJ3MYMeFibSbhmjpp36GbspvWkiYz4Dt+urLHG ZGffhTZQ4dSkp3+nBsvyJwh9SFK71H/GpVOAje3zZ9DwtbAoxEMGRLgeM5Jk1xQ4 ehtbTTr21fpQIXtJ780Jg9GlDShRwm5jgeBCdWJG77i9CrszPpE1N8hXv+9ZQvIe FF6NJUd4rOlRYEv2sqbAHxG0Z12sDCm2ZUpuZMFP+TthPbPHY3S7OQQZOjIfoWOO XKL7iA== Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4fhfvxhv06-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 20 Jul 2026 15:08:14 +0000 (GMT) Received: by mail-pj1-f70.google.com with SMTP id 98e67ed59e1d1-38e25e4b41cso6175077a91.0 for ; Mon, 20 Jul 2026 08:08:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1784560094; x=1785164894; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=gv/Mc9YDpHV0q4uPifKaSiGmnLmBmYxDgZHdP91zT1w=; b=EQhu4NRM80w1uiwUb4m61THXqwqjhFPYyb1KEtgvv3qSqFKJozxf/ioLV8NnzzZxct X/e4/S//2uRb3ymr1oXnQSjQ12Oo3fJhPQXzuhWc7GwiTYt2YoooVxJakWrdeBB5FsAV RQDGszdmMjjVPIuk+Se1HE/6hlZm9ZdnCg5rDfOZbghcAdAprOKDXarSwwckD9krYILK 01j2OtAmws0bscs5NRx832ck6V6T3FiZG3mxhFhCiGnEZjdFReuKrarsh8rA3M9zrEpp kaVAz7e5d1FdVznWJ0bhYHXAsUOVJifKb4o4/UDOaAWxZYbPek6dxlv3H8lYWvdI8k7J UKzA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784560094; x=1785164894; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=gv/Mc9YDpHV0q4uPifKaSiGmnLmBmYxDgZHdP91zT1w=; b=lKweHJXK+sBesOYmzhJg7qaD/qHhS2kFEd0HSjlxT/hljlfjaZT9igxfkWP1ICzwK8 FIYNx0lVQIQXkqDTMWS48c8EDw8dyX0PjM/85nitKYPGg3ujXgkMy/pxkH2LJ83KJGed SFb4M5oxEM3MV2AkXb8mgdJY49nxTboX4ROjsImmjG4O8FWtYyxmP4N3/AOgyZcxCHwA hvgSYOkH+E5C3rFbHZhgCQDENepW+mjSiw/G9SX5GcH65MaxSymyuouGvZXiKSGB/D8A LZhvgQRslisB7quN0iw/yVmamiQUpm9rH72FO5CkiIlJKdbyf2DHn7XRE/88McbOeWJk RCqg== X-Forwarded-Encrypted: i=1; AHgh+RrEAyOecnIUaseYbRVm/MHbo+Q+s/ocp6ilwdYBG6d/1uzzrLhqjAAHsPpEzC8faLwuaGIfPJNvjZbnmLg=@vger.kernel.org X-Gm-Message-State: AOJu0Yyv8/Z+MgTDmGWB2lhwx0MxwBTX8GWibL0jDeAWY0jc2xcNLwMf /gItSJGr1kSzP+/UOUB/S2XWZjO6eQi2wnSGzSp68un1WEZgp//JEX8XYS/ZdkfFk8doBLDXYme gUmKS4ApX3STrad67s1Uj4LTDMgf00f4Xv7v0I30aooghw49KUYbBHHauOx89gORwTro= X-Gm-Gg: AR+sD118b3KFuhBsGGS+wUv8wakk6VtKw5LyFJ6NUYT0Rfnu9s+wg7YK0DZ8OyX1LOX LMcbSFrXXyP7i/v7JzsEPoHBineT/NaurshHxOuSfVU0sfXS5sKUrWqBeJsFQS9/vKyzk0us3o8 TOWzuA4zSgGMUWFS9j1FLTsKk2uvKQReswH0kOtd7/ZnSAUdfZWk7BI11w+NmTR3YSZ2cJ5QRoS +odyN15vUS/QN21tEz9aIGZXPjlaexXlq2j0h2MsKILxXr8dLfmrvJvOH4vm9PEUqmFUdu2T6C+ QZCuDxo9qupWwoXP/fbzAjr8P6+Tq/rUWCKtQGlfpa1xUD5BovV9OrIDcWOxszPA/R6+MosZqhL vuqZXQOWRlezewjD2iClcLDe1LU/T8Fj2Ug== X-Received: by 2002:a17:90a:d64d:b0:38e:75f3:ad4d with SMTP id 98e67ed59e1d1-38e75f3c7b8mr6126667a91.7.1784560093470; Mon, 20 Jul 2026 08:08:13 -0700 (PDT) X-Received: by 2002:a17:90a:d64d:b0:38e:75f3:ad4d with SMTP id 98e67ed59e1d1-38e75f3c7b8mr6126607a91.7.1784560092842; Mon, 20 Jul 2026 08:08:12 -0700 (PDT) Received: from hu-ptalari-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-38e39e0531asm7856411a91.5.2026.07.20.08.08.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 08:08:12 -0700 (PDT) From: Praveen Talari Date: Mon, 20 Jul 2026 20:37:50 +0530 Subject: [PATCH 2/3] serial: qcom-geni: Use resources helper APIs in runtime PM functions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260720-reuse_common_geni_framework_helpers-v1-2-c3330ab9b982@oss.qualcomm.com> References: <20260720-reuse_common_geni_framework_helpers-v1-0-c3330ab9b982@oss.qualcomm.com> In-Reply-To: <20260720-reuse_common_geni_framework_helpers-v1-0-c3330ab9b982@oss.qualcomm.com> To: Greg Kroah-Hartman , Jiri Slaby , konrad.dybcio@oss.qualcomm.com, bjorn.andersson@oss.qualcomm.com Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, chandana.chiluveru@oss.qualcomm.com, mukesh.savaliya@oss.qualcomm.com, Praveen Talari X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784560081; l=4419; i=praveen.talari@oss.qualcomm.com; s=20251114; h=from:subject:message-id; bh=SJjTUHlMNzbHbPh8w/YzLyeDEVKL94o5fz6ILL/JKb0=; b=OyhGjbHRDyoNgr0J2oh/rCDVPJa4GFtpCjveUX/ghuyX3X2p7aOqFKHSPRaYsFpiRt/G6SmGP /5ERsA+2iEjBIn49DiaH8yixwQA/xzRuh2Ol2ZcpUE7zaTF8TpK6K7N X-Developer-Key: i=praveen.talari@oss.qualcomm.com; a=ed25519; pk=NGK/88fjyHXgfhIKwag7+uIytOmyOypvZ/hDFaYPEss= X-Authority-Analysis: v=2.4 cv=HKLz0Itv c=1 sm=1 tr=0 ts=6a5e39de cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=sJIhbiIXeOZG86cfmoMA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzIwMDE2NyBTYWx0ZWRfXx7YdAKvdQWxT h3mIf2JWk++evKDnH//mSBo1sXKtObTZ6SNlBC/0NccW/NN/4hK1YKGXWyeEjc9ZC4t5E+utv3g jt/86BbGzE5cAlIFZ031u+wGN8XojVw= X-Proofpoint-GUID: 8K-o-MwyYVP7k3Bhelj0NVxJjm6-ci8f X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzIwMDE2NyBTYWx0ZWRfX6nnih9iRfkaY P/F/sLa5GUK9kdIwhXsb9N/z/z1WAWlRVGjvJuLlVDL3lk9aAQTTn1CV6qgoqX519AirCpe47gw UJq5CkURLIWk+OR+/caZRT2vjwBE3xWPv2KhkjijduzZoppq4x+1o1efc9iL2rI66wnWiBhXZzt Re1nLjjwh29BCtuKNewNSY+4xRzJqdI9rXh8NGI6NAjKZKWmiLA68ZEAATLoJpgHKj8b0hMv9M2 kP1X4+YR6DYqsvlLbLPe9GdpejIYMWHhqFGdMz+mlpp9m6FUfeJRCHfVeY0/NfAt7dwF/XmQ8YM G/8/d1x4H9y5iFDV/VALm8NVvuE+vasz0eVju1M0ZaESj+pX67SkcCY62W/8ska2oFB0x7kJ4Wb N1xEt0Kk3AcZn3kF5D7Aar4g5pMONFEiIwUR8z/cU9nwHzZk+GAtBhYinlNpYFAf/+3i1rNonpV m+2EyJ8ewT4+4rhflzg== X-Proofpoint-ORIG-GUID: 8K-o-MwyYVP7k3Bhelj0NVxJjm6-ci8f X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-20_03,2026-07-20_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 impostorscore=0 clxscore=1015 malwarescore=0 bulkscore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607200167 To manage GENI serial engine resources during runtime power management, drivers currently need to call functions for ICC, clock, and SE resource operations in both suspend and resume paths, resulting in code duplication across drivers. The new geni_se_resources_activate() and geni_se_resources_deactivate() helper APIs addresses this issue by providing a streamlined method to enable or disable all resources based, thereby eliminating redundancy across drivers. Signed-off-by: Praveen Talari --- drivers/tty/serial/qcom_geni_serial.c | 72 +++++++++-------------------------- 1 file changed, 18 insertions(+), 54 deletions(-) diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c index 4f34eef15598..17735c940541 100644 --- a/drivers/tty/serial/qcom_geni_serial.c +++ b/drivers/tty/serial/qcom_geni_serial.c @@ -115,7 +115,8 @@ struct qcom_geni_device_data { enum geni_se_xfer_mode mode; int (*resources_init)(struct geni_se *se); int (*set_rate)(struct uart_port *uport, unsigned int baud); - int (*power_state)(struct uart_port *uport, bool state); + int (*power_on)(struct geni_se *se); + int (*power_off)(struct geni_se *se); }; struct qcom_geni_private_data { @@ -1658,47 +1659,6 @@ static struct uart_driver qcom_geni_uart_driver = { .nr = CONFIG_SERIAL_QCOM_GENI_UART_PORTS, }; -static int geni_serial_resources_on(struct uart_port *uport) -{ - struct qcom_geni_serial_port *port = to_dev_port(uport); - int ret; - - ret = geni_icc_enable(&port->se); - if (ret) - return ret; - - ret = geni_se_resources_on(&port->se); - if (ret) { - geni_icc_disable(&port->se); - return ret; - } - - if (port->clk_rate) - dev_pm_opp_set_rate(uport->dev, port->clk_rate); - - return 0; -} - -static int geni_serial_resources_off(struct uart_port *uport) -{ - struct qcom_geni_serial_port *port = to_dev_port(uport); - int ret; - - dev_pm_opp_set_rate(uport->dev, 0); - ret = geni_se_resources_off(&port->se); - if (ret) - return ret; - - geni_icc_disable(&port->se); - - return 0; -} - -static int geni_serial_resource_state(struct uart_port *uport, bool power_on) -{ - return power_on ? geni_serial_resources_on(uport) : geni_serial_resources_off(uport); -} - static void qcom_geni_serial_pm(struct uart_port *uport, unsigned int new_state, unsigned int old_state) { @@ -1964,25 +1924,27 @@ static void qcom_geni_serial_remove(struct platform_device *pdev) static int __maybe_unused qcom_geni_serial_runtime_suspend(struct device *dev) { struct qcom_geni_serial_port *port = dev_get_drvdata(dev); - struct uart_port *uport = &port->uport; - int ret = 0; - if (port->dev_data->power_state) - ret = port->dev_data->power_state(uport, false); - - return ret; + return port->dev_data->power_off ? + port->dev_data->power_off(&port->se) : 0; } static int __maybe_unused qcom_geni_serial_runtime_resume(struct device *dev) { struct qcom_geni_serial_port *port = dev_get_drvdata(dev); struct uart_port *uport = &port->uport; - int ret = 0; + int ret; + + if (port->dev_data->power_on) { + ret = port->dev_data->power_on(&port->se); + if (ret) + return ret; + } - if (port->dev_data->power_state) - ret = port->dev_data->power_state(uport, true); + if (port->se.has_opp && port->clk_rate) + return dev_pm_opp_set_rate(uport->dev, port->clk_rate); - return ret; + return 0; } static int qcom_geni_serial_suspend(struct device *dev) @@ -2040,7 +2002,8 @@ static const struct qcom_geni_device_data qcom_geni_console_data = { .mode = GENI_SE_FIFO, .resources_init = geni_se_resources_init, .set_rate = geni_serial_set_rate, - .power_state = geni_serial_resource_state, + .power_on = geni_se_resources_activate, + .power_off = geni_se_resources_deactivate, }; static const struct qcom_geni_device_data sa8255p_qcom_geni_console_data = { @@ -2056,7 +2019,8 @@ static const struct qcom_geni_device_data qcom_geni_uart_data = { .mode = GENI_SE_DMA, .resources_init = geni_se_resources_init, .set_rate = geni_serial_set_rate, - .power_state = geni_serial_resource_state, + .power_on = geni_se_resources_activate, + .power_off = geni_se_resources_deactivate, }; static const struct qcom_geni_device_data sa8255p_qcom_geni_uart_data = { -- 2.34.1