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Signed-off-by: Alexandre Courbot --- rust/kernel/io/register.rs | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/rust/kernel/io/register.rs b/rust/kernel/io/register.rs index 4070fabb00f4..eeb7f859f8b9 100644 --- a/rust/kernel/io/register.rs +++ b/rust/kernel/io/register.rs @@ -527,11 +527,11 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) { /// space segment. Since both instances of `CPU_CTL` share the same layout, we don't want to define /// them twice and would prefer a way to select which one to use from a single definition. /// -/// This can be done using the `Base + Offset` syntax when specifying the register's address: +/// This can be done using the `Base: Offset` syntax when specifying the register's address: /// /// ```ignore /// register! { -/// pub RELATIVE_REG(u32) @ Base + 0x80 { +/// pub RELATIVE_REG(u32) @ Base: 0x80 { /// ... /// } /// } @@ -579,7 +579,7 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) { /// // This makes `CPU_CTL` accessible from all implementors of `RegisterBase`. /// register! { /// /// CPU core control. -/// pub CPU_CTL(u32) @ CpuCtlBase + 0x10 { +/// pub CPU_CTL(u32) @ CpuCtlBase: 0x10 { /// 0:0 start; /// } /// } @@ -595,7 +595,7 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) { /// // Aliases can also be defined for relative register. /// register! { /// /// Alias to CPU core control. -/// pub CPU_CTL_ALIAS(u32) => CpuCtlBase + CPU_CTL { +/// pub CPU_CTL_ALIAS(u32) => CpuCtlBase: CPU_CTL { /// /// Start the aliased CPU core. /// 1:1 alias_start; /// } @@ -703,7 +703,7 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) { /// /// ```ignore /// register! { -/// pub RELATIVE_REGISTER_ARRAY(u8)[10, stride = 4] @ Base + 0x100 { +/// pub RELATIVE_REGISTER_ARRAY(u8)[10, stride = 4] @ Base: 0x100 { /// ... /// } /// } @@ -747,7 +747,7 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) { /// // 64 per-cpu scratch registers, arranged as a contiguous array. /// register! { /// /// Per-CPU scratch registers. -/// pub CPU_SCRATCH(u32)[64] @ CpuCtlBase + 0x00000080 { +/// pub CPU_SCRATCH(u32)[64] @ CpuCtlBase: 0x00000080 { /// 31:0 value; /// } /// } @@ -774,7 +774,7 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) { /// // Alias to `SCRATCH[8]` used to convey the firmware exit code. /// register! { /// /// Per-CPU firmware exit status code. -/// pub CPU_FIRMWARE_STATUS(u32) => CpuCtlBase + CPU_SCRATCH[8] { +/// pub CPU_FIRMWARE_STATUS(u32) => CpuCtlBase: CPU_SCRATCH[8] { /// 7:0 status; /// } /// } @@ -784,12 +784,12 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) { /// // registers of the two declarations below are interleaved. /// register! { /// /// Scratch registers bank 0. -/// pub CPU_SCRATCH_INTERLEAVED_0(u32)[16, stride = 8] @ CpuCtlBase + 0x00000d00 { +/// pub CPU_SCRATCH_INTERLEAVED_0(u32)[16, stride = 8] @ CpuCtlBase: 0x00000d00 { /// 31:0 value; /// } /// /// /// Scratch registers bank 1. -/// pub CPU_SCRATCH_INTERLEAVED_1(u32)[16, stride = 8] @ CpuCtlBase + 0x00000d04 { +/// pub CPU_SCRATCH_INTERLEAVED_1(u32)[16, stride = 8] @ CpuCtlBase: 0x00000d04 { /// 31:0 value; /// } /// } -- 2.55.0