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[2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5b2a9b8c6f6sm309696e87.4.2026.07.21.23.37.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jul 2026 23:37:10 -0700 (PDT) From: Dmitry Baryshkov Date: Wed, 22 Jul 2026 09:36:30 +0300 Subject: [PATCH 15/24] drm/msm/dp: do not reject wide-bus modes while a YUV420 mode is active Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260722-drm-msm-display-interface-v1-15-368c10fe62fd@oss.qualcomm.com> References: <20260722-drm-msm-display-interface-v1-0-368c10fe62fd@oss.qualcomm.com> In-Reply-To: <20260722-drm-msm-display-interface-v1-0-368c10fe62fd@oss.qualcomm.com> To: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1946; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=p0Rd9oPmiONIcDwy0yPI6eTa7uZg5IuJSk3yNdX0Wak=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBqYGTo7I5ZjesJCBg3IFjmsDzx71PdD/aI0HSsQ aGpMsdSYMWJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCamBk6AAKCRCLPIo+Aiko 1fQbB/4nTv3dHJr5ET9DfzmacacMg6Lx5fk0mMMtffHkL8JP45XJYKWl+Rm3zUPCmhEpI3M3kuH v1iiYEs92BjV3qIR2LQPiPyFG0OGHs12OUzdyblcKRynzx98lxFORbs0aQRrhtWd+1MJwfT3fqV feM85ZV2U40B1hziTqzjEsM5PQi0rUfJ+DXvNICxrGcKUdK6kFFKTF2c690sXq9Ve+nU9R1GrFU VEqPwamOB8U+r6fl4kay7wZ78ENgvXXYT+jMVbQ4UliP5bM1phX3LxTKGsJJBOPvm2n2YrGDLzF Cw6rj1aQg6ivTcKes/E6iWRJbRn5XC1grg30hvGwav2J5RuS X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-GUID: I5D5q06asa5KbzkN194A6ZkRjA4Q2y8j X-Authority-Analysis: v=2.4 cv=CbE4Irrl c=1 sm=1 tr=0 ts=6a60651a cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=Y4CFgLxAi_mMOGnJ0dIA:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 X-Proofpoint-ORIG-GUID: I5D5q06asa5KbzkN194A6ZkRjA4Q2y8j X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzIyMDA2MCBTYWx0ZWRfXz/A5SS0Hh1nc nmvxibBtoUPCaivw7In44vqF54JaZ6k//+XfMfpcnK3Z2vsqrRsc2OYLPPnL4ubKUNM7APKlzj+ m44XOFrvBWA3XC5U/Mu5bc3zJe6tm9i59EMpPhwIzD28JflpNQsbJ9D67VrD7Hu+OMUENRYCjSv D0eTNt2yeAzP+E9+L6NqeRU+0sdq2IcjPIghmAuaCowseRy15vGn2T0KOYvS2mQIP4YPnEGf8CY 4YB/R60qduE799NnnWoqGKzo+8zfFVE4qG9HpDzE8IiszJzV4pD4s7FBMpXfHWkShMEiLrZaYO9 9xvjionF1liTJLbcjqLGg8QDJD05dzu6oluLTxgNZvtoIbSMXMNXNLcSOAk1oJSuufdZAEtsGuq 5AOxlTJCv9KRAqZg9pOsqm4tD623w7un8Rrh6DnkV9hsLJfuwVwYfAAYrozGIIFgaVANFxRj/pH X0KzV+C7xhhZDZNELzw== X-Proofpoint-Spam-Info: AW1haW4tMjYwNzIyMDA2MCBTYWx0ZWRfXx15bclntjOk5 umvWT8K3fO6v6RfDmXmz+gZBLfX1FaD4fjxVqaZ+g/rBQnIlngUG81e+hYm9iCEwq5k2fN4hotK lScGPdXdUO/qS9+ZYu3UnYYtIKG6ZQ8= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-22_02,2026-07-21_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 suspectscore=0 clxscore=1015 spamscore=0 malwarescore=0 bulkscore=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607220060 msm_dp_bridge_mode_valid() halves the candidate mode's pixel clock when the sink either uses YUV 420 output or drives the wide bus, so that modes relying on those to stay under DP_MAX_PIXEL_CLK_KHZ are accepted. The wide bus part is queried through msm_dp_wide_bus_available(), which returns false whenever the currently committed mode uses YUV 420 output: it inspects the stored msm_dp_mode.out_fmt_is_yuv_420 of the active mode, not the mode being validated. Consequently, while a YUV 420 mode is active, an RGB mode that needs the wide bus to fit under DP_MAX_PIXEL_CLK_KHZ has its pixel clock left un-halved and is wrongly rejected as MODE_CLOCK_HIGH. The candidate mode's YUV 420 status is already evaluated as is_yuv_420, and the wide bus is disabled precisely for YUV 420 output, so halving the pixel clock for either case is equivalent to halving it when the candidate is YUV 420 or the controller supports the wide bus. Test wide_bus_supported directly, so the decision no longer depends on the format of the active mode. Fixes: df9cf852ca30 ("drm/msm/dp: account for widebus and yuv420 during mode validation") Assisted-by: Claude:claude-opus-4-8 Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 1baeb9401cfa..bd1354f2c15d 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -722,7 +722,7 @@ enum drm_mode_status msm_dp_bridge_mode_valid(struct drm_bridge *bridge, if (is_yuv_420 && !msm_dp_display->panel->vsc_sdp_supported) return MODE_NO_420; - if (is_yuv_420 || msm_dp_wide_bus_available(dp)) + if (is_yuv_420 || msm_dp_display->wide_bus_supported) mode_pclk_khz /= 2; if (mode_pclk_khz > DP_MAX_PIXEL_CLK_KHZ) -- 2.47.3