From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2D9B4267B07; Thu, 23 Jul 2026 02:46:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784774816; cv=none; b=AvxuIKRvR17t2unNWmQ8dUR1uGIM3w5zTn64A6t2bOl7kDqwBt2q0mtNPsVNSfmYEfSBqg4piVZFBljmg5gqbHAq9j/1UjBBZyXvZputBqhBZFCfr279MjqLncwk2OnCN4AQzlieEqzoy11qyaZyZkFMfjbJhocgb1IT+61Lyis= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784774816; c=relaxed/simple; bh=YdvKTHtsWdGlW0Sjxw0NjwckSvfgTwzFyzB+oIPY2a4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BSw30WjoNo5AlahMjJDY6i9QFtKVFxP580DlcNB6JE7s9Q80H7SvVawUCHJuo7cGIFuWVpXUVhMTTi/oDsUJzrWyYHKwDg0wL8Fo5WnC/y1UMXZP1Fon8okJBdsjwbf1LA9YOcfGE5hQHa5OzLSubvYNTlQu1wnzM4zVm74c4zs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kgoOTJKm; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kgoOTJKm" Received: by smtp.kernel.org (Postfix) with ESMTPS id A5B0EC2BCC6; Thu, 23 Jul 2026 02:46:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1784774815; bh=YdvKTHtsWdGlW0Sjxw0NjwckSvfgTwzFyzB+oIPY2a4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=kgoOTJKmy+27AkDnUlAUG0J2Qb44l8ZSAOcYUxQ8V3Xxax05dsDL+12rPoluAMK5w zYRyIp+K5UkMAe3d5rdCQd/dqO8TM9fYn19T23zg6lfy2n1CJ+rSVGBGuZTKTu7Kf0 EckBGMSXGubpUuE/nCznUMZp3oRO1vRQ3DcEiykvxuArlD7Nx9OWfsIDXgaD03IXjs DkFyZIdWQ51A7Tsnyni4mm6UVidIIDjcsicT0RyeIadEHiEDgYrhIcQwPLR5vVO+YE 6x9X2i4VK7a1YrWocWKHsvXnw+YfYA/Yj9gF9Lyp1ACwZl9Zp8lBxkmF9ok/oNSAJN ubYzKDXw2QDHA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86F40C531CA; Thu, 23 Jul 2026 02:46:55 +0000 (UTC) From: Aaron Kling via B4 Relay Date: Wed, 22 Jul 2026 21:46:48 -0500 Subject: [PATCH v3 2/2] soc/tegra: pmc: Add Tegra210B01 support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260722-t210b01-pmc-v3-2-1c5b970788f2@gmail.com> References: <20260722-t210b01-pmc-v3-0-1c5b970788f2@gmail.com> In-Reply-To: <20260722-t210b01-pmc-v3-0-1c5b970788f2@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter Cc: Thierry Reding , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, Aaron Kling , Alexandre Hamamdjian , Thomas Makin X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784774814; l=3862; i=webgeek1234@gmail.com; s=20250217; h=from:subject:message-id; bh=Y1pHP7vg6I2QmRiAaP+rGxaAo7nCvhZmwdrLipCbgNI=; b=6iwi7CxRktYp4fke9ya21qJEIFqPOeABdP5l/JWtOSbgOBAR0VNvZKeWKgFu/3FnW9rLsbd6M yToDu3QzuKQCkEJ8HBBhScxB4LyzeD0z7uqqYXM6jOgk6fONC6ulnnt X-Developer-Key: i=webgeek1234@gmail.com; a=ed25519; pk=TQwd6q26txw7bkK7B8qtI/kcAohZc7bHHGSD7domdrU= X-Endpoint-Received: by B4 Relay for webgeek1234@gmail.com/20250217 with auth_id=342 X-Original-From: Aaron Kling Reply-To: webgeek1234@gmail.com From: Alexandre Hamamdjian The PMC in Tegra210B01 is very similar to the one in the original Tegra210, but has a few powergate differences. Specifically sata, venc, and ve2 are removed. Signed-off-by: Alexandre Hamamdjian Co-developed-by: Thomas Makin Signed-off-by: Thomas Makin Co-developed-by: Aaron Kling Signed-off-by: Aaron Kling --- drivers/soc/tegra/pmc.c | 61 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index f419a5395545f..d133f445e4ec4 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -3897,6 +3897,66 @@ static const struct tegra_pmc_soc tegra210_pmc_soc = { .has_single_mmio_aperture = true, }; +static const char * const tegra210b01_powergates[] = { + [TEGRA_POWERGATE_CPU] = "crail", + [TEGRA_POWERGATE_3D] = "3d", + [TEGRA_POWERGATE_PCIE] = "pcie", + [TEGRA_POWERGATE_MPE] = "mpe", + [TEGRA_POWERGATE_CPU1] = "cpu1", + [TEGRA_POWERGATE_CPU2] = "cpu2", + [TEGRA_POWERGATE_CPU3] = "cpu3", + [TEGRA_POWERGATE_CPU0] = "cpu0", + [TEGRA_POWERGATE_C0NC] = "c0nc", + [TEGRA_POWERGATE_SOR] = "sor", + [TEGRA_POWERGATE_DIS] = "dis", + [TEGRA_POWERGATE_DISB] = "disb", + [TEGRA_POWERGATE_XUSBA] = "xusba", + [TEGRA_POWERGATE_XUSBB] = "xusbb", + [TEGRA_POWERGATE_XUSBC] = "xusbc", + [TEGRA_POWERGATE_VIC] = "vic", + [TEGRA_POWERGATE_IRAM] = "iram", + [TEGRA_POWERGATE_NVDEC] = "nvdec", + [TEGRA_POWERGATE_NVJPG] = "nvjpg", + [TEGRA_POWERGATE_AUD] = "aud", + [TEGRA_POWERGATE_DFD] = "dfd", +}; + +static const struct tegra_pmc_soc tegra210b01_pmc_soc = { + .supports_core_domain = false, + .num_powergates = ARRAY_SIZE(tegra210b01_powergates), + .powergates = tegra210b01_powergates, + .num_cpu_powergates = ARRAY_SIZE(tegra210_cpu_powergates), + .cpu_powergates = tegra210_cpu_powergates, + .has_tsense_reset = true, + .has_gpu_clamps = true, + .needs_mbist_war = false, + .has_io_pad_wren = true, + .maybe_tz_only = true, + .num_io_pads = ARRAY_SIZE(tegra210_io_pads), + .io_pads = tegra210_io_pads, + .num_io_pad_vctrls = ARRAY_SIZE(tegra210_io_pad_vctrls), + .io_pad_vctrls = tegra210_io_pad_vctrls, + .num_pin_descs = ARRAY_SIZE(tegra210_pin_descs), + .pin_descs = tegra210_pin_descs, + .regs = &tegra20_pmc_regs, + .init = tegra20_pmc_init, + .setup_irq_polarity = tegra20_pmc_setup_irq_polarity, + .powergate_set = tegra114_powergate_set, + .irq_set_wake = tegra210_pmc_irq_set_wake, + .irq_set_type = tegra210_pmc_irq_set_type, + .reset_sources = tegra210_reset_sources, + .num_reset_sources = ARRAY_SIZE(tegra210_reset_sources), + .reset_levels = NULL, + .num_reset_levels = 0, + .num_wake_events = ARRAY_SIZE(tegra210_wake_events), + .wake_events = tegra210_wake_events, + .pmc_clks_data = tegra_pmc_clks_data, + .num_pmc_clks = ARRAY_SIZE(tegra_pmc_clks_data), + .has_blink_output = true, + .has_usb_sleepwalk = true, + .has_single_mmio_aperture = true, +}; + static const struct tegra_io_pad_soc tegra186_io_pads[] = { TEGRA_IO_PAD(TEGRA_IO_PAD_CSIA, 0, 0x74, 0x78, "csia"), TEGRA_IO_PAD(TEGRA_IO_PAD_CSIB, 1, 0x74, 0x78, "csib"), @@ -4824,6 +4884,7 @@ static const struct of_device_id tegra_pmc_match[] = { { .compatible = "nvidia,tegra194-pmc", .data = &tegra194_pmc_soc }, { .compatible = "nvidia,tegra186-pmc", .data = &tegra186_pmc_soc }, { .compatible = "nvidia,tegra210-pmc", .data = &tegra210_pmc_soc }, + { .compatible = "nvidia,tegra210b01-pmc", .data = &tegra210b01_pmc_soc }, { .compatible = "nvidia,tegra132-pmc", .data = &tegra124_pmc_soc }, { .compatible = "nvidia,tegra124-pmc", .data = &tegra124_pmc_soc }, { .compatible = "nvidia,tegra114-pmc", .data = &tegra114_pmc_soc }, -- 2.54.0