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Thu, 23 Jul 2026 05:15:33 -0700 (PDT) Received: from hu-raviravi-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cbb8f1a8a1fsm2687005a12.26.2026.07.23.05.15.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Jul 2026 05:15:33 -0700 (PDT) From: Ravi Hothi To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mohammad.rafi.shaik@oss.qualcomm.com, ajay.nandam@oss.qualcomm.com Subject: [PATCH v3 1/2] arm64: dts: qcom: eliza: Add LPASS macro and SoundWire support Date: Thu, 23 Jul 2026 17:45:15 +0530 Message-Id: <20260723121516.2341900-2-ravi.hothi@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260723121516.2341900-1-ravi.hothi@oss.qualcomm.com> References: <20260723121516.2341900-1-ravi.hothi@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: QHXTDtKe601g-h8PmYs8nFjscTWoeJQ7 X-Proofpoint-GUID: QHXTDtKe601g-h8PmYs8nFjscTWoeJQ7 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzIzMDEyMCBTYWx0ZWRfX0rv4Ft9RUUon +jvUaHBxUpHEw8nCBCRfNCH4dH86HmqQqo5hStGII2VY6u/H9V9s6B38Qpgu1OsbxiSPWIs3hOW uB7dNFvK3++t0RmP2bsA37cxHl5SxIY= X-Authority-Analysis: v=2.4 cv=L/ItheT8 c=1 sm=1 tr=0 ts=6a6205e7 cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=Cc5UsSPITet5yPTV4qQA:9 a=x9snwWr2DeNwDh03kgHS:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzIzMDEyMCBTYWx0ZWRfXy65E0m7/fcHK ydn1htx6kuJWhKAMU0EQFzzECvXYGSw5pg/V1/Kp/P94z3QzIApgLpnHdYk4dLByIy2mGAHWJCq svXeFrC3Jwk/V3NIv9lkeyUzUyx+9C+fu0+kIeBL2Hx6nr6hhugy3B5DdGWkyrvo1vUw6JR8Rs6 ZGjg7ERrHnSuRKa1MDE2T678iVH9BLjA0iw5WXcXuAt2itrIep09lz49VvkhRRHfTpIAlbnvfIk zkYDfbbEUs9C4VhMMOtBlexBxlhB6yPmegqh5Vtv+/a0oqmrAV2itK5gTllj7+cNEoD/ukRCM+1 8HAUhbDVyu06obuBEo9e6EXoYXOvfFGApccaWgDPTzWCi1eKMYmNcDM5bDyuo83tMw5g26XjzYA BzmB6f1Y3FH80HyoyTBE96exTEJRMuIOhWtVIzT5h+RWDmLd8nPfb9pzAbb1Kd/W/OBbX7fqmzB HI06IFT3ogqoPIZOdZg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-23_03,2026-07-22_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 adultscore=0 suspectscore=0 priorityscore=1501 impostorscore=0 spamscore=0 bulkscore=0 malwarescore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607230120 Add SoC-level LPASS WSA macro, VA macro, SoundWire controller and LPASS LPI pin controller nodes. DMIC and WSA SoundWire pinctrl states are defined inside the LPASS LPI pin controller node. The hardware is similar to the SM8750 platform. The WSA macro, VA macro and SoundWire controller are kept disabled so board DTS files can selectively enable and configure them. Signed-off-by: Ravi Hothi --- arch/arm64/boot/dts/qcom/eliza.dtsi | 193 ++++++++++++++++++++++++++++ 1 file changed, 193 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/eliza.dtsi b/arch/arm64/boot/dts/qcom/eliza.dtsi index fa6a22f2da6a..33fcedfff7b7 100644 --- a/arch/arm64/boot/dts/qcom/eliza.dtsi +++ b/arch/arm64/boot/dts/qcom/eliza.dtsi @@ -19,6 +19,7 @@ #include #include #include +#include / { interrupt-parent = <&intc>; @@ -2056,6 +2057,79 @@ q6prmcc: clock-controller { }; }; + lpass_wsamacro: codec@6b00000 { + compatible = "qcom,eliza-lpass-wsa-macro", + "qcom,sm8550-lpass-wsa-macro"; + reg = <0x0 0x06b00000 0x0 0x1000>; + + clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK + LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE + LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE + LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_vamacro>; + clock-names = "mclk", + "macro", + "dcodec", + "fsgen"; + + #clock-cells = <0>; + clock-output-names = "mclk"; + #sound-dai-cells = <1>; + + status = "disabled"; + }; + + swr0: soundwire@6b10000 { + compatible = "qcom,soundwire-v2.1.0", + "qcom,soundwire-v2.0.0"; + reg = <0x0 0x06b10000 0x0 0x10000>; + interrupts = ; + + clocks = <&lpass_wsamacro>; + clock-names = "iface"; + + label = "WSA"; + + qcom,din-ports = <4>; + qcom,dout-ports = <9>; + + qcom,ports-sinterval = + /bits/ 16 <0x07 0x1f 0x3f 0x07 0x1f 0x3f + 0x18f 0x18f 0x18f 0x0f 0x0f 0xff 0x31f>; + qcom,ports-offset1 = + /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 + 0x00 0x00 0x00 0x06 0x0d 0xff 0x00>; + qcom,ports-offset2 = + /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f + 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-hstart = + /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff + 0x08 0x0e 0x0e 0xff 0xff 0xff 0x0f>; + qcom,ports-hstop = + /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff + 0x08 0x0e 0x0e 0xff 0xff 0xff 0x0f>; + qcom,ports-word-length = + /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff + 0x08 0x0f 0x0f 0x00 0xff 0xff 0x18>; + qcom,ports-block-pack-mode = + /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 + 0x00 0x01 0x01 0x01 0x01 0x00 0x00>; + qcom,ports-block-group-count = + /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0x00 0x00 0xff 0xff 0xff 0xff>; + qcom,ports-lane-control = + /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0x00 0x00 0xff 0xff 0xff 0xff>; + + #address-cells = <2>; + #size-cells = <0>; + #sound-dai-cells = <1>; + + status = "disabled"; + }; + lpass_lpiaon_noc: interconnect@7400000 { compatible = "qcom,eliza-lpass-lpiaon-noc"; reg = <0x0 0x07400000 0x0 0x19080>; @@ -2070,6 +2144,125 @@ lpass_lpicx_noc: interconnect@7420000 { #interconnect-cells = <2>; }; + lpass_vamacro: codec@7660000 { + compatible = "qcom,eliza-lpass-va-macro", + "qcom,sm8550-lpass-va-macro"; + reg = <0x0 0x07660000 0x0 0x2000>; + + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK + LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE + LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE + LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "mclk", + "macro", + "dcodec"; + + #clock-cells = <0>; + clock-output-names = "fsgen"; + #sound-dai-cells = <1>; + + status = "disabled"; + }; + + lpass_tlmm: pinctrl@7760000 { + compatible = "qcom,eliza-lpass-lpi-pinctrl"; + reg = <0x0 0x07760000 0x0 0x20000>; + + clocks = <&q6prmcc LPASS_HW_MACRO_VOTE + LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE + LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "audio"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&lpass_tlmm 0 0 23>; + + dmic01_default: dmic01-default-state { + clk-pins { + pins = "gpio6"; + function = "dmic1_clk"; + drive-strength = <8>; + output-high; + }; + + data-pins { + pins = "gpio7"; + function = "dmic1_data"; + drive-strength = <8>; + input-enable; + }; + }; + + dmic23_default: dmic23-default-state { + clk-pins { + pins = "gpio8"; + function = "dmic2_clk"; + drive-strength = <8>; + output-high; + }; + + data-pins { + pins = "gpio9"; + function = "dmic2_data"; + drive-strength = <8>; + input-enable; + }; + }; + + dmic45_default: dmic45-default-state { + clk-pins { + pins = "gpio12"; + function = "dmic3_clk"; + drive-strength = <8>; + output-high; + }; + + data-pins { + pins = "gpio13"; + function = "dmic3_data"; + drive-strength = <8>; + input-enable; + }; + }; + + dmic67_default: dmic67-default-state { + clk-pins { + pins = "gpio21"; + function = "dmic4_clk"; + drive-strength = <8>; + output-high; + }; + + data-pins { + pins = "gpio22"; + function = "dmic4_data"; + drive-strength = <8>; + input-enable; + }; + }; + + wsa_swr_active: wsa-swr-active-state { + clk-pins { + pins = "gpio10"; + function = "wsa_swr_clk"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + + data-pins { + pins = "gpio11"; + function = "wsa_swr_data"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + }; + sdhc_2: mmc@8804000 { compatible = "qcom,eliza-sdhci", "qcom,sdhci-msm-v5"; reg = <0x0 0x08804000 0x0 0x1000>; -- 2.34.1