From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC003421250 for ; Fri, 24 Jul 2026 10:35:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784889361; cv=none; b=A2zjm888ixObVjyFODeL5k/CFJrV5E2tk3dpt4LaHg3bbQ0fx4HCygP/Iy/7Zpndj/IEJZZzZrXGpwthrbBHcjlcXaxpT0s1OnpDVda+0YFTv5lLgyIWfbD68lP3TYYFy/tohs+GOvlrjfyaAia+LPD9LYlMDBzf0CrAVdXI3dA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784889361; c=relaxed/simple; bh=CvB9YvUBIkQH9BcIh+3hUBKOEZT/PvTTwrkmHJauE2A=; h=From:Subject:Date:Message-Id:MIME-Version:Content-Type:To:Cc; b=fFrS0Vm9E4E8XfOLsEyagYHXgwFHkTaLHAQ2o4ePFcp+qu8nKSYfKGsHPiveAec0LsWphNkxVqXlgMeQqWTGrJZLdY2QYMZXuDlcq2waFOOL421yRW5Jo77wjCTfok/E1G485hrNl4iHE8rzLjUyE+In8VsDE1npQDWKy3EGhAM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=U6lCvAGC; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=TEeXhuv/; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="U6lCvAGC"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="TEeXhuv/" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66OADrV72742615 for ; Fri, 24 Jul 2026 10:35:58 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:message-id :mime-version:subject:to; s=qcppdkim1; bh=CAptM4MQ5Q2YfJ/h+CqLee LfiQB5bwOrYf6+13We8oA=; b=U6lCvAGCAQWP5Aq2n3uRaQ3r61/4pYuMNXMmWf tOx6ShMpOox062H4IALsXeVjqRYyouR0G9IaTZz28oG6Y6AI7JEmOsyAZgR/keZ4 WSsz9gACmw3IrhmtNflVumbYjtkwM31xnlUBlNRkw+e3Us0sA7DeVjUVJZbxW6qs 88jusBkYwZyrSW59qP8YHdu4P8R0+/XZtQxFGH1/d+9Rd/E00GGrGqnCJL5s7O0G KBW8HMh2PEJ/zT8U7ZcwzCqccIUIQ74jhEREEiofSJkzsJNX/qBSGQ/lmlegcAUL 2ji5FJzaVLzAzc/XFaZEHBGAbUTFgvCKpM0MMaYkYEHZz6kg== Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4fm0p51c94-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 24 Jul 2026 10:35:58 +0000 (GMT) Received: by mail-pj1-f70.google.com with SMTP id 98e67ed59e1d1-38ecc48b3c2so389617a91.1 for ; Fri, 24 Jul 2026 03:35:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1784889357; x=1785494157; darn=vger.kernel.org; h=cc:to:content-transfer-encoding:content-type:mime-version :message-id:date:subject:from:from:to:cc:subject:date:message-id :reply-to:content-type; bh=CAptM4MQ5Q2YfJ/h+CqLeeLfiQB5bwOrYf6+13We8oA=; b=TEeXhuv/X9oIRNUaJ1FVeT1W8hlPMAGiDopZxpveWx7+xbMXbi4lt2O27t46h1AlTR zUQYJ6VbjW7d2PB0Lofs707axS36a1U+AlgXXUO7cqY96tUpI1rmW6ZuRM3quEWfY2YO B+ruRUhjX82z7Xw1veYvMjjugMlzG4HSrDVpN1A4D/T7eJVRt4+PSph29Thmo0pjiKZg gR4l9+yWELNs5OqyKMFZj1/hZ+kqR0OuuL0SDxlVudycVwiOGPoUUTX+k7r44wbeNuzx ZLIjZEVts1ZZO/kYNpOXumN1d/usGMyCT44ATV2CjqqXK9VuK8maZ/KM4Rs+mH3P/dn0 y1SA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784889357; x=1785494157; h=cc:to:content-transfer-encoding:content-type:mime-version :message-id:date:subject:from:x-gm-gg:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to:content-type; bh=CAptM4MQ5Q2YfJ/h+CqLeeLfiQB5bwOrYf6+13We8oA=; b=lPhZDBIsta1tlaT7dZVkc0vMEtv6slIW0HDfGnAIZqmVCiVGpqvOxbNM4pvmeVS+BS F7UslImtU+JdNSTYnapy41HF+eJCIPRUUbylCNsWCtdqBQESfzxMVTpW2N8D4ZV6LAYN LN+7RRQuxpwhLk7jyR8NT0NH5646zdOLGannCYvE6TokNhta4PlXgzDoRuC0MTntSfwM ErBzTTwOsvKqWxe7Kk9b0IvGGDNUToBtkf2qoGstgRoVCIOBshkIs+A3/36gCiyyP0Je EMdE4DGTWT0ZOILG+4YN7I7SA3t0rrLns8/zI2phF74OLUwK9LKqZq8OGhKwK2/oeOIZ wNTw== X-Forwarded-Encrypted: i=1; AHgh+RoLsaQN4Ia5w4LA7XLOMkX/FBu19O0qLXWvOyW+ey+W8WsC1gpQFbWGXpNP2On97Plh/FAGxjhh8mM6K4k=@vger.kernel.org X-Gm-Message-State: AOJu0YzNR/JwgJ2INKLv3zrXSY2NsV2i2zYl6ev2DkNhD5clkAKC/2sa PXzLVrB8cao83LrXBvmHT+wtEHJJbdrwn20KVuFiQNEqSPSXThGoeoq9GtZOcccO2awT0JDVh6q svnRMIhtteDIUcJAf76ddHK/aVkuN+Y1EJ2+Ejtes8NCOlBK+mROjSTA61/wi2fIEWLs= X-Gm-Gg: AR+sD10urO+5tHpVOGhuuc3KzB0/2vOecqFxLidrzj9BmpfdIgj4hdOL8oG9DSxHb90 wRJ8ZMZfpNfSHveNxjNIp17dxB3xu0lz4oemHoTjqsmmXHfhzWCfPYq3qK36TjaPNsuSREc8nx8 VTgdb2o6uEf0JluLajVEOrpVWksnW/aC64bmICZYXiCZJyLlc7J+1sO/Tn7tS/rEYra/2qKKsnH /NqF9CydJgojGqMpS8n/zdRjO7gJy3F4JKNg2lvHATbXilwj7ncaWSErr6juefXcG2Vi9bhyZcV f5WkS+8NzBMZhOxqrjt1VWpwra6bcKH6aEuYTarVKb3KDK58Mm9JqmtFZ1euoAN4YVnn4SnZ+rl 9Sdlm1Fvg5eLQCPk8zxhmV6iHE6D7Wv8= X-Received: by 2002:a17:90b:49:b0:37f:c22a:c188 with SMTP id 98e67ed59e1d1-38ec63e7d3fmr7193016a91.4.1784889357512; Fri, 24 Jul 2026 03:35:57 -0700 (PDT) X-Received: by 2002:a17:90b:49:b0:37f:c22a:c188 with SMTP id 98e67ed59e1d1-38ec63e7d3fmr7192985a91.4.1784889357012; Fri, 24 Jul 2026 03:35:57 -0700 (PDT) Received: from hu-sachinku-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-38f03b0e976sm1228657a91.5.2026.07.24.03.35.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Jul 2026 03:35:56 -0700 (PDT) From: Sachin Kumar Garg Subject: [PATCH v6 0/3] media: qcom: iris: add multi slice support Date: Fri, 24 Jul 2026 16:05:49 +0530 Message-Id: <20260724-iris_multi_slice-v6-0-a99d160cb42a@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAAVAY2oC/3XOTWrDMBAF4KsEraugf1lZ9R6lBEke1QI7aiXHt ATfvXKg1BBlM/AW8713QwVyhIJOhxvKsMQS06UG9XJAfrCXD8CxrxkxwhTRVOGYYzlP13GO5zJ GD1gqoVmnrZGKo/r2mSHE7zv59l5zyGnC85DB/kOCdY/QQjHFhnnOtKIGXHhNpRy/rnb0aZqO9 Wz8EMuc8s998MK2kr9tukEyTLCRkjgawHHjHslt4sJ3DqMNh1fH9l5RqzoNGp44Yu/whiOqI2Q glgfQwT9z5N4RDUduTnDS8J4ZJ0TDWdf1Fzq/++TeAQAA X-Change-ID: 20260716-iris_multi_slice-5647287a9563 To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Vedang Nagar , Stefan Schmidt , Hans Verkuil Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Sachin Kumar Garg , Vishnu Reddy X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784889352; l=4854; i=sachin.garg@oss.qualcomm.com; s=20260211; h=from:subject:message-id; bh=CvB9YvUBIkQH9BcIh+3hUBKOEZT/PvTTwrkmHJauE2A=; b=EipOyTAK/VrGWhkVFsbeG+4IdMzcpGjOQ/ZsFPasfOckoKclCJKL1CrnE03Mau+O5ABzzFEm4 O9/wuMmS3ugBrg61/dLuj1EA/xDxlWBLEnE5u+NtLjmRJ6p1p6Pr/UN X-Developer-Key: i=sachin.garg@oss.qualcomm.com; a=ed25519; pk=KcRhp4CP9cR1V2tg6xSNRnB2STYaU0vVigdUF4Actu0= X-Authority-Analysis: v=2.4 cv=Pq6jqQM3 c=1 sm=1 tr=0 ts=6a63400e cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=7Z090XU5ozNHmVG9x8gA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-GUID: -2k19P9QTpZOt2EaoyNRBJwCqu4EFC70 X-Proofpoint-ORIG-GUID: -2k19P9QTpZOt2EaoyNRBJwCqu4EFC70 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzI0MDA5NiBTYWx0ZWRfXwiZwFJRz509r zSNl0COK7Oheth5ftxuJz4zUl5QUNAXDgV0lowA+zoBO+gwRyU8rWWjWDFBiIMVW+efnQxwjRbU qzhu2efxom+sOaZ6aT6S0S42he+5C4Q= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzI0MDA5NiBTYWx0ZWRfX+M/u19K1/Q4y SWMtb1pL0NOjdycL+w98rE6wkVec3KFuMrVvNl9a9FTbhE+RPKi2q1sfZIn0obnaL3xs05/5M+n +/11GKECIwD+RhoG5vDfcR+ZWON1hc8bEtOtLjyNr4lhAlN0gHrtn+r0zzWcc/RQn3rILqLIvEX Id7XfT88xPaq+0x3jwyd51JwKMFZco/ZiqL43Tj2bkT1aLKzjMWDleLdiIp2zeMXZYsWXnzD4k5 fbmBke9v1u+1A6uZBLCrJJa3uZwWA5xCc9xgPFZfiPXlPDD7fKtuy5zAF6a1IiJkZDLbA+DWk7j rvNckXtY7xxOfTtWwU48//A+JgD0Xdlr/JkfYTfbOdX7uX/JFds0F1deayhrf0wVd8MgQmobaPr jOZ2LGVw/x6YWTDZUQ4dK/nbDLk3gU/WXTmzMiYtdmURrTz8TOHf4KK07UlNE89yiBdDH7Z9+GX C24TXY1f4ybVmaYfUyA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-24_02,2026-07-22_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 spamscore=0 lowpriorityscore=0 adultscore=0 bulkscore=0 clxscore=1015 impostorscore=0 suspectscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607240096 This series adds support for multi-slice encoding in the Qualcomm Iris driver. Multi-slice mode allows encoding a single frame into multiple slices, which can improve error resilience and enable parallel processing. The feature supports two slice modes: - MAX_MB mode: slices are created based on macroblock count, controlled via V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB - MAX_BYTES mode: slices are created based on byte size, controlled via V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES Clients can enable slice mode using the V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE control. Patch 1 is a prerequisite fix: iris_set_stage() computes a work_mode but never caches it back into inst->fw_caps[STAGE].value, leaving buffer-size and clock-frequency calculations based on a stale value. Patch 2 is another prerequisite fix: iris_set_stage() currently always selects STAGE_2 work mode for encoder sessions, but CBR rate control requires STAGE_1. This is fixed by forcing STAGE_1 when BITRATE_MODE is set to CBR. Patch 3 adds the multi-slice support itself for Iris HFI Gen2 based targets (qcs8300, sm8550 and other SM8550-derived targets). Support for HFI Gen1 targets will be added in a follow-up series. This series has been verified with GST level testing. Command used: gst-launch-1.0 -v videotestsrc ! video/x-raw,format=NV12, \ width=1280,height=720,framerate=30/1 ! v4l2h264enc output-io-mode=4 | capture-io-mode=4 extra-controls="controls,video_bitrate_mode=1, \ slice_partitioning_method=1,number_of_mbs_in_a_slice=460;" \ ! filesink location=/opt/test_enc.h264 Changes in v6: - Reordered local variable declarations in iris_set_slice_count() to follow reverse Christmas tree style. - Renamed default_slice_caps_vpu3x to slice_caps_vpu3x. - Link to v5: https://lore.kernel.org/r/20260724-iris_multi_slice-v5-0-4fb593d29b44@oss.qualcomm.com Changes in v5: - Fixed unbounded slice count under RC_OFF in iris_set_slice_count() for the MAX_BYTES use case. - Addressed remaining coding-style review comments. - Link to v4: https://lore.kernel.org/r/20260723-iris_multi_slice-v4-0-45f0a3fe7fce@oss.qualcomm.com Changes in v4: - Split out a new prerequisite patch (patch 1) to cache the computed work_mode into inst->fw_caps[STAGE].value in iris_set_stage(), since this fixes a pre-existing bug independent of the CBR change and needed its own Fixes tag. - Deduplicated the per-target slice capability limits that were previously repeated identically across platform_inst_cap_qcs8300 and platform_inst_cap_sm8550. Introduced struct platform_inst_slice_caps and moved it to iris_platform_data (one level up from platform_inst_caps), since all Iris HFI Gen2 targets share the same encoder capability table and hence the same slice limits; a single default_slice_caps_vpu3x instance is now referenced by all Gen2 platforms. - Link to v3: https://lore.kernel.org/r/20260721-iris_multi_slice-v3-0-adc61a687e7e@oss.qualcomm.com Changes in v3: - Patch 1 (force stage 1 work mode for CBR RC): cache the computed work_mode into inst->fw_caps[STAGE].value so buffer-size and clock-frequency calculations stay consistent with what is actually configured on firmware. - Patch 2 (multi-slice support): - Use inst->hfi_rc_type instead of the raw V4L2 BITRATE_MODE value when validating/deriving slice parameters, avoiding a mismatch between V4L2 and firmware rate-control enums. - Round up (instead of truncate) when computing the minimum MAX_MB and MAX_BYTES slice size floors, so the hardware's max-slices-per-frame limit is never exceeded. Changes in v2: - Added a prerequisite patch to force STAGE_1 work mode for CBR rate control on the encoder, required for multi-slice encoding to work correctly. - Addressed review comments on the multi-slice patch (updated commit subject and description). Signed-off-by: Sachin Kumar Garg --- Sachin Kumar Garg (3): media: iris: cache work mode after computing it in iris_set_stage media: iris: force stage 1 work mode for CBR RC on encoder media: iris: add support for multi_slice in iris encoder drivers/media/platform/qcom/iris/iris_ctrls.c | 91 ++++++++++++++++++++++ drivers/media/platform/qcom/iris/iris_ctrls.h | 1 + drivers/media/platform/qcom/iris/iris_hfi_gen2.c | 33 +++++++- .../platform/qcom/iris/iris_hfi_gen2_defines.h | 2 + .../platform/qcom/iris/iris_platform_common.h | 16 ++++ .../media/platform/qcom/iris/iris_platform_vpu3x.c | 17 ++++ 6 files changed, 159 insertions(+), 1 deletion(-) --- base-commit: 42f83a32259a82c4481d3cccf560c3bfeb32c892 change-id: 20260716-iris_multi_slice-5647287a9563 Best regards, -- Sachin Kumar Garg