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Fri, 24 Jul 2026 20:17:43 -0700 (PDT) From: Cody Kang Date: Fri, 24 Jul 2026 23:16:36 -0400 Subject: [PATCH 04/17] dt-bindings: soc: spacemit: allow eDP/DP PHY PLL pixel clocks on K3 APMU Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260724-k3-display-v1-4-f22a10a52867@gmail.com> References: <20260724-k3-display-v1-0-f22a10a52867@gmail.com> In-Reply-To: <20260724-k3-display-v1-0-f22a10a52867@gmail.com> To: David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Vinod Koul , Neil Armstrong , Haylen Chu , Michael Turquette , Stephen Boyd , Brian Masney , Philipp Zabel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: dri-devel@lists.freedesktop.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, spacemit@lists.linux.dev, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org, Cody Kang X-Mailer: b4 0.15.1 The APMU's eDP pixel-clock muxes select the DP PHY PLLs as parents, so the K3 syscon takes two clock inputs the other variants do not have. Gate them behind the K3 compatible instead of widening the shared clock list, so a non-K3 syscon cannot silently accept clocks it has no mux for. Signed-off-by: Cody Kang --- .../bindings/soc/spacemit/spacemit,k1-syscon.yaml | 30 +++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml b/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml index d3a7c93c3c54..b8fc6632a392 100644 --- a/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml +++ b/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml @@ -31,14 +31,18 @@ properties: maxItems: 1 clocks: - maxItems: 4 + minItems: 4 + maxItems: 6 clock-names: + minItems: 4 items: - const: osc - const: vctcxo_1m - const: vctcxo_3m - const: vctcxo_24m + - const: edp0_pll_pxclk + - const: edp1_pll_pxclk "#clock-cells": const: 1 @@ -95,6 +99,30 @@ allOf: - clocks - clock-names - "#clock-cells" + # Only the K3 APMU exposes the two eDP/DP PHY PLL pixel clocks as extra + # inputs (parents of its eDP pixel-clock muxes); every other variant has + # the four base oscillator inputs only. + - if: + properties: + compatible: + contains: + const: spacemit,k3-syscon-apmu + then: + properties: + clocks: + minItems: 4 + maxItems: 6 + clock-names: + minItems: 4 + maxItems: 6 + else: + properties: + clocks: + minItems: 4 + maxItems: 4 + clock-names: + minItems: 4 + maxItems: 4 additionalProperties: false -- 2.43.0