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Multi-slice mode allows encoding a single frame into multiple slices, which can improve error resilience and enable parallel processing. The feature supports two slice modes: - MAX_MB mode: slices are created based on macroblock count, controlled via V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB - MAX_BYTES mode: slices are created based on byte size, controlled via V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES Clients can enable slice mode using the V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE control. Patch 1 is a prerequisite fix: iris_set_stage() computes a work_mode but never caches it back into inst->fw_caps[STAGE].value, leaving buffer-size and clock-frequency calculations based on a stale value. Patch 2 is another prerequisite fix: iris_set_stage() currently always selects STAGE_2 work mode for encoder sessions, but CBR rate control requires STAGE_1. This is fixed by forcing STAGE_1 when BITRATE_MODE is set to CBR. Patch 3 adds the multi-slice support itself for Iris HFI Gen2 based targets (qcs8300, sm8550 and other SM8550-derived targets). Support for HFI Gen1 targets will be added in a follow-up series. This series has been verified with GST level testing. Command used: gst-launch-1.0 -v videotestsrc ! video/x-raw,format=NV12, \ width=1280,height=720,framerate=30/1 ! v4l2h264enc output-io-mode=4 | capture-io-mode=4 extra-controls="controls,video_bitrate_mode=1, \ slice_partitioning_method=1,number_of_mbs_in_a_slice=460;" \ ! filesink location=/opt/test_enc.h264 Changes in v7: - Moved slice_caps_vpu3x from a static const in iris_platform_vpu3x.c to a real definition in iris_hfi_gen2.c, extern-declared in iris_platform_common.h (same pattern as iris_hfi_gen2_data), so it no longer has to sit between #include lines to satisfy ordering. - Link to v6: https://lore.kernel.org/r/20260724-iris_multi_slice-v6-0-a99d160cb42a@oss.qualcomm.com Changes in v6: - Reordered local variable declarations in iris_set_slice_count() to follow reverse Christmas tree style. - Renamed default_slice_caps_vpu3x to slice_caps_vpu3x. - Link to v5: https://lore.kernel.org/r/20260724-iris_multi_slice-v5-0-4fb593d29b44@oss.qualcomm.com Changes in v5: - Fixed unbounded slice count under RC_OFF in iris_set_slice_count() for the MAX_BYTES use case. - Addressed remaining coding-style review comments. - Link to v4: https://lore.kernel.org/r/20260723-iris_multi_slice-v4-0-45f0a3fe7fce@oss.qualcomm.com Changes in v4: - Split out a new prerequisite patch (patch 1) to cache the computed work_mode into inst->fw_caps[STAGE].value in iris_set_stage(), since this fixes a pre-existing bug independent of the CBR change and needed its own Fixes tag. - Deduplicated the per-target slice capability limits that were previously repeated identically across platform_inst_cap_qcs8300 and platform_inst_cap_sm8550. Introduced struct platform_inst_slice_caps and moved it to iris_platform_data (one level up from platform_inst_caps), since all Iris HFI Gen2 targets share the same encoder capability table and hence the same slice limits; a single default_slice_caps_vpu3x instance is now referenced by all Gen2 platforms. - Link to v3: https://lore.kernel.org/r/20260721-iris_multi_slice-v3-0-adc61a687e7e@oss.qualcomm.com Changes in v3: - Patch 1 (force stage 1 work mode for CBR RC): cache the computed work_mode into inst->fw_caps[STAGE].value so buffer-size and clock-frequency calculations stay consistent with what is actually configured on firmware. - Patch 2 (multi-slice support): - Use inst->hfi_rc_type instead of the raw V4L2 BITRATE_MODE value when validating/deriving slice parameters, avoiding a mismatch between V4L2 and firmware rate-control enums. - Round up (instead of truncate) when computing the minimum MAX_MB and MAX_BYTES slice size floors, so the hardware's max-slices-per-frame limit is never exceeded. Changes in v2: - Added a prerequisite patch to force STAGE_1 work mode for CBR rate control on the encoder, required for multi-slice encoding to work correctly. - Addressed review comments on the multi-slice patch (updated commit subject and description). Signed-off-by: Sachin Kumar Garg --- Sachin Kumar Garg (3): media: iris: cache work mode after computing it in iris_set_stage media: iris: force stage 1 work mode for CBR RC on encoder media: iris: add support for multi_slice in iris encoder drivers/media/platform/qcom/iris/iris_ctrls.c | 91 ++++++++++++++++++++++ drivers/media/platform/qcom/iris/iris_ctrls.h | 1 + drivers/media/platform/qcom/iris/iris_hfi_gen2.c | 45 ++++++++++- .../platform/qcom/iris/iris_hfi_gen2_defines.h | 2 + .../platform/qcom/iris/iris_platform_common.h | 17 ++++ .../media/platform/qcom/iris/iris_platform_vpu3x.c | 5 ++ 6 files changed, 160 insertions(+), 1 deletion(-) --- base-commit: 42f83a32259a82c4481d3cccf560c3bfeb32c892 change-id: 20260716-iris_multi_slice-5647287a9563 Best regards, -- Sachin Kumar Garg