From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id D0B143AEF36 for ; Sat, 25 Jul 2026 11:37:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784979437; cv=none; b=VlMu8kbFBwSSWwvnpanhKl+hJmDrG3WI4+eLqRraU86fLaV/XXtlCGd5rq0ygCA8yk0CS4qix2e19FMCxDz1q4FZd4AhvhBwHrmSyDeRkDjZndxt+t9wFM+tp42Momfops9n7BOizsvXiNZ1zXkKXGCljsu6uxJki4YCztTWJrA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784979437; c=relaxed/simple; bh=GHTTzxHWLdl1uMrdB8kCdE27n2DxxXM4vDcg0NzZJF0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=X96ODmzxZLM4nse7OAgnSUfDvHCYCku2+z/nCovSduRfcztXv8p1+YA3LG3LjO8nepEGD5dlaJZ6KZy3qqHT2yjccNyUFKdaRHGZr7nMjfohbYy17NWHHlp1QrfnjR49z60QjCO7KnCEICPgwzcZOjTi2prg/l7Vnzz9mRnMhqM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=bPKZeMMY; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="bPKZeMMY" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 10B171477; Sat, 25 Jul 2026 04:37:07 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.2.213.3]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B60683F86F; Sat, 25 Jul 2026 04:37:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1784979431; bh=GHTTzxHWLdl1uMrdB8kCdE27n2DxxXM4vDcg0NzZJF0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bPKZeMMYBkdEDZO8Z4MhPVvO8s36MvKXa30C35CQa3cJ0BzmP81i/a6r+5YZS5O8L lHZrM0gliQYkzSgED9ctAg5GqSn5921PnJ7IyjGtHg/jcWJDINBCplYvV2pkKBaLhv derrKWH/VzGTnF1feq72lkHFNU5QC46mebTz9p70= From: Yeoreum Yun To: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: suzuki.poulose@arm.com, mike.leach@arm.com, james.clark@linaro.org, alexander.shishkin@linux.intel.com, leo.yan@arm.com, jie.gan@oss.qualcomm.com, Yeoreum Yun Subject: [PATCH v9 06/13] coresight: etm3x: fix inconsistencies with sysfs configuration Date: Sat, 25 Jul 2026 12:36:38 +0100 Message-ID: <20260725113645.57519-7-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260725113645.57519-1-yeoreum.yun@arm.com> References: <20260725113645.57519-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The current ETM3x configuration via sysfs can lead to the following inconsistencies: - If a configuration is modified via sysfs while a perf session is active, the running configuration may differ between before a sched-out and after a subsequent sched-in. To resolve these issues, separate the configuration into: - active_config: the configuration applied to the current session - config: the configuration set via sysfs Additionally: - Since active_config and related fields are accessed only by the local CPU in etm_enable/disable_sysfs_smp_call() (similar to perf enable/disable), remove the lock/unlock from the sysfs enable/disable path and starting/dying_cpu path except when to access config fields only. Fixes: 1925a470ce69 ("coresight: etm3x: splitting struct etm_drvdata") Signed-off-by: Yeoreum Yun --- drivers/hwtracing/coresight/coresight-etm.h | 4 +- .../coresight/coresight-etm3x-core.c | 38 +++++++++---------- 2 files changed, 22 insertions(+), 20 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm.h b/drivers/hwtracing/coresight/coresight-etm.h index 1d753cca2943..f3796162168d 100644 --- a/drivers/hwtracing/coresight/coresight-etm.h +++ b/drivers/hwtracing/coresight/coresight-etm.h @@ -226,7 +226,8 @@ struct etm_config { * @etmccr: value of register ETMCCR. * @etmccer: value of register ETMCCER. * @traceid: value of the current ID for this component. - * @config: structure holding configuration parameters. + * @active_config: structure holding current running configuration. + * @config: structure holding sysfs mode configuration. */ struct etm_drvdata { struct csdev_access csa; @@ -248,6 +249,7 @@ struct etm_drvdata { u32 etmccr; u32 etmccer; u32 traceid; + struct etm_config active_config; struct etm_config config; }; diff --git a/drivers/hwtracing/coresight/coresight-etm3x-core.c b/drivers/hwtracing/coresight/coresight-etm3x-core.c index 862ad0786699..93dc98145b66 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm3x-core.c @@ -308,7 +308,7 @@ void etm_config_trace_mode(struct etm_config *config) static int etm_parse_event_config(struct etm_drvdata *drvdata, struct perf_event *event) { - struct etm_config *config = &drvdata->config; + struct etm_config *config = &drvdata->active_config; struct perf_event_attr *attr = &event->attr; u8 ts_level; @@ -367,7 +367,7 @@ static int etm_enable_hw(struct etm_drvdata *drvdata) { int i, rc; u32 etmcr; - struct etm_config *config = &drvdata->config; + struct etm_config *config = &drvdata->active_config; struct coresight_device *csdev = drvdata->csdev; CS_UNLOCK(drvdata->csa.base); @@ -442,24 +442,30 @@ static int etm_enable_hw(struct etm_drvdata *drvdata) struct etm_enable_arg { struct etm_drvdata *drvdata; struct coresight_path *path; + struct etm_config config; int rc; }; static void etm_enable_sysfs_smp_call(void *info) { struct etm_enable_arg *arg = info; + struct etm_drvdata *drvdata; struct coresight_device *csdev; if (WARN_ON(!arg)) return; - csdev = arg->drvdata->csdev; + drvdata = arg->drvdata; + csdev = drvdata->csdev; if (!coresight_take_mode(csdev, CS_MODE_SYSFS)) { /* Someone is already using the tracer */ arg->rc = -EBUSY; return; } + drvdata->active_config = arg->config; + drvdata->traceid = arg->path->trace_id; + arg->rc = etm_enable_hw(arg->drvdata); /* The tracer didn't start */ @@ -468,6 +474,7 @@ static void etm_enable_sysfs_smp_call(void *info) return; } + drvdata->sticky_enable = true; csdev->path = arg->path; } @@ -512,10 +519,6 @@ static int etm_enable_sysfs(struct coresight_device *csdev, struct coresight_pat struct etm_enable_arg arg = { }; int ret; - spin_lock(&drvdata->spinlock); - - drvdata->traceid = path->trace_id; - /* * Configure the ETM only if the CPU is online. If it isn't online * hw configuration will take place on the local CPU during bring up. @@ -523,23 +526,24 @@ static int etm_enable_sysfs(struct coresight_device *csdev, struct coresight_pat if (cpu_online(drvdata->cpu)) { arg.drvdata = drvdata; arg.path = path; + + raw_spin_lock(&drvdata->spinlock); + arg.config = drvdata->config; + raw_spin_unlock(&drvdata->spinlock); + ret = smp_call_function_single(drvdata->cpu, etm_enable_sysfs_smp_call, &arg, 1); if (!ret) ret = arg.rc; - if (!ret) - drvdata->sticky_enable = true; } else { ret = -ENODEV; } - if (ret) - etm_release_trace_id(drvdata); - - spin_unlock(&drvdata->spinlock); - if (!ret) dev_dbg(&csdev->dev, "ETM tracing enabled\n"); + else + etm_release_trace_id(drvdata); + return ret; } @@ -565,7 +569,7 @@ static int etm_enable(struct coresight_device *csdev, struct perf_event *event, static void etm_disable_hw(struct etm_drvdata *drvdata) { int i; - struct etm_config *config = &drvdata->config; + struct etm_config *config = &drvdata->active_config; struct coresight_device *csdev = drvdata->csdev; CS_UNLOCK(drvdata->csa.base); @@ -631,8 +635,6 @@ static void etm_disable_sysfs(struct coresight_device *csdev) { struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - spin_lock(&drvdata->spinlock); - /* * Executing etm_disable_hw on the cpu whose ETM is being disabled * ensures that register writes occur when cpu is powered. @@ -640,8 +642,6 @@ static void etm_disable_sysfs(struct coresight_device *csdev) smp_call_function_single(drvdata->cpu, etm_disable_sysfs_smp_call, drvdata, 1); - spin_unlock(&drvdata->spinlock); - /* * we only release trace IDs when resetting sysfs. * This permits sysfs users to read the trace ID after the trace -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}