From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj1-f45.google.com (mail-pj1-f45.google.com [209.85.216.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 72EE33002DC for ; Sun, 26 Jul 2026 01:05:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.45 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785027927; cv=none; b=OvmvQ0c6piTLq2A1lg1XtYyOXNVdOHlUKGNOmdgwow7IggSC8ZrZtqS8orEev241T4ASCN98KWtiOFr2jiOJtPaNTIhlMXcIM6n1PAzUoAEUF8zuPKGMddxN6GRsbd2w4NvehVjite93TxgXmHM5YUJXqqCxviP4ZCdYPqoUUUY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785027927; c=relaxed/simple; bh=HpyyYcHV0QDWre1HzQWkRCOo52HgZFRIEAsFIinut0E=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=vCdtfZBGQGZNRtW7qesPxbs8ueB7o2Hauzpv2CsnQdBoX37YsJxGGx5lIh1o7dBa131Ma0V0wQuYnVO43xxMELWE85uvGj+p74/2ibeJUZ/UGZtaFexL5MLglzOOBJLB7D3lNxZY0+tFLMTsG5WD4tGuQWVkdw2yRU0zlwutJw4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=c7cMM+WO; arc=none smtp.client-ip=209.85.216.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="c7cMM+WO" Received: by mail-pj1-f45.google.com with SMTP id 98e67ed59e1d1-38dcbade417so1711001a91.1 for ; Sat, 25 Jul 2026 18:05:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1785027926; x=1785632726; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=euSwC6dPZiFaZaIT4hWsH8I/nZDprva/hiP/N1htvPw=; b=c7cMM+WOp5/nvf/V57wNGLhXOPj7H0tQV5lQ9FYEqFOtpBvlmXBvMGjnpUgxxk/eQq X9SfvSuD5I6iziRBsk7SGHtR4XhvEQHGy5Cs/BQ8Du5Zz2xn9Obymcu0llzM+Ig9qqfD azCoStoSIhFswlslv0JIKkb2lNtQBMtFwV+Uxf9wnrYRg4Mmx7SEUwRKIN7qYCt1p5ds X6MNtIJUw+/FLtyfQE0RmUnV/HKaZlout5vEBQXY7bJkttYNm+g70IUjfIJD0S/r+JAM cvMXC/KB+lNdsXC4dBfQ8udUs/qU/AWTWEayzp/DKaEBKGdWakifFisjZf/Mv8/QVAMx 1q9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1785027926; x=1785632726; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=euSwC6dPZiFaZaIT4hWsH8I/nZDprva/hiP/N1htvPw=; b=S6/88Gg19BL808teKPcTVtzoH5wC52F4haMNQIcflL221GWymK/kT/AenX/wtoi2P3 MjRuktxruNei/n4nCGwhmrcdgEFxjY7VUyngxhTPLxSC5Rc/wmJRMz3U2dTLqdtSZ8hT bcSYVite7lP5dopfwEyZ0N2xYh3QR68/Ky5/KCo7/Rmckh0/rUw0+nM7u3+EnpHt19vN mhXSGUgh94mo2b91ot8xNawvKuUKd4bV8F+3o4mVAX8eudPPmV3NgYt/cFReXoEIkwld fUNvEomykhlZyfn5knJCQwas98xIFcD97ozeTbYbV1NpX7g/MQxPgMnSpGX6w8C3yTCP zlzA== X-Forwarded-Encrypted: i=1; AHgh+Rr3n8pDmnPfzdW0sXEOd/wcXfMX13B52Dj9O4BZKSzZitZgFd8STVAZLpug3izzp3W3FS+HhDdHgJibzLI=@vger.kernel.org X-Gm-Message-State: AOJu0YywlFEH0I4TV+viYdMLGK9vojJ0MUCcajJMkFWiW9H8FCHS4dRl 9ReH88yjOGlHRGKFsU8nHtdDvbtkkxmtG8J9THuu7sPjZqJL7Rzk0SAh X-Gm-Gg: AR+sD10ZsSZQhkvHX0qHK6OpZneDiWkEPrMXro0NzHTWEFeQ4SU2TgCGPMsoB9/ADvA VN36+XjNrusU/wmqxHTiNWkkGNe9dxTZVfeN5a8q37IbeDeQvS8s0e7uuqthCCxxf0zLbNFQGzY VbfiUTWlhWU+aV/rOlorT13PbB3ygr5IFgz/oHmsp3piplBrIGBz5d8n+ejnoAalXWAX6FyAzDm 5p5TnQeX29eH5dYlxRX7qy/qviaY10vBOuLMcgWhO0YowWvPoHBHnv7dz4wXrqe5YT1bnVLGTIx 3f9PxKq+ufHw60X80K87VDxgpmgq9HiY8DyADddBOOZw2GBG2yRmSIz3vYw4ArLF0VumgLKmfj5 B2kz9+ZE/Nmz+gIaNXTh4TdL3TR7ZZrhc214qAt3v/bcGWfD/NqrlV/3Grj/y86AFfRJAcM99LG wMR4dex6+k3ImnsBvZYBwgPprur+4FmapcKwa1zluKwk8FALz8LTvkJ9bZPnfSPm9aLFexHLinw mmP X-Received: by 2002:a17:90b:39a7:b0:38e:b400:a854 with SMTP id 98e67ed59e1d1-38f2977c44cmr3701463a91.37.1785027925744; Sat, 25 Jul 2026 18:05:25 -0700 (PDT) Received: from dtor-ws.sjc.corp.google.com ([2a00:79e0:2ebe:8:e2c2:1f24:32d5:9d51]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-13e0f4a039asm11821445c88.9.2026.07.25.18.05.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Jul 2026 18:05:24 -0700 (PDT) From: Dmitry Torokhov To: Shenghao Ding , Kevin Lu , Baojun Xu , Sen Wang , Liam Girdwood , Mark Brown Cc: Jaroslav Kysela , Takashi Iwai , linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/7] ASoC: tlv320aic32x4: do not allocate gpio config separately Date: Sat, 25 Jul 2026 18:05:12 -0700 Message-ID: <20260726010519.117805-2-dmitry.torokhov@gmail.com> X-Mailer: git-send-email 2.55.0.229.g6434b31f56-goog In-Reply-To: <20260726010519.117805-1-dmitry.torokhov@gmail.com> References: <20260726010519.117805-1-dmitry.torokhov@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Now that the driver only works with device tree we do not need to keep GPIO config separate from the driver structure. Signed-off-by: Dmitry Torokhov --- sound/soc/codecs/tlv320aic32x4.c | 47 +++++++++++++------------------- 1 file changed, 19 insertions(+), 28 deletions(-) diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c index da582f2c940c..87b155599e94 100644 --- a/sound/soc/codecs/tlv320aic32x4.c +++ b/sound/soc/codecs/tlv320aic32x4.c @@ -31,10 +31,6 @@ #include "tlv320aic32x4.h" -struct aic32x4_setup_data { - unsigned int gpio_func[5]; -}; - struct aic32x4_priv { struct regmap *regmap; u32 power_cfg; @@ -48,7 +44,8 @@ struct aic32x4_priv { struct regulator *supply_dv; struct regulator *supply_av; - struct aic32x4_setup_data *setup; + unsigned int gpio_func[5]; + struct device *dev; enum aic32x4_type type; @@ -959,41 +956,41 @@ static void aic32x4_setup_gpios(struct snd_soc_component *component) /* setup GPIO functions */ /* MFP1 */ - if (aic32x4->setup->gpio_func[0] != AIC32X4_MFPX_DEFAULT_VALUE) { + if (aic32x4->gpio_func[0] != AIC32X4_MFPX_DEFAULT_VALUE) { snd_soc_component_write(component, AIC32X4_DINCTL, - aic32x4->setup->gpio_func[0]); + aic32x4->gpio_func[0]); snd_soc_add_component_controls(component, aic32x4_mfp1, ARRAY_SIZE(aic32x4_mfp1)); } /* MFP2 */ - if (aic32x4->setup->gpio_func[1] != AIC32X4_MFPX_DEFAULT_VALUE) { + if (aic32x4->gpio_func[1] != AIC32X4_MFPX_DEFAULT_VALUE) { snd_soc_component_write(component, AIC32X4_DOUTCTL, - aic32x4->setup->gpio_func[1]); + aic32x4->gpio_func[1]); snd_soc_add_component_controls(component, aic32x4_mfp2, ARRAY_SIZE(aic32x4_mfp2)); } /* MFP3 */ - if (aic32x4->setup->gpio_func[2] != AIC32X4_MFPX_DEFAULT_VALUE) { + if (aic32x4->gpio_func[2] != AIC32X4_MFPX_DEFAULT_VALUE) { snd_soc_component_write(component, AIC32X4_SCLKCTL, - aic32x4->setup->gpio_func[2]); + aic32x4->gpio_func[2]); snd_soc_add_component_controls(component, aic32x4_mfp3, ARRAY_SIZE(aic32x4_mfp3)); } /* MFP4 */ - if (aic32x4->setup->gpio_func[3] != AIC32X4_MFPX_DEFAULT_VALUE) { + if (aic32x4->gpio_func[3] != AIC32X4_MFPX_DEFAULT_VALUE) { snd_soc_component_write(component, AIC32X4_MISOCTL, - aic32x4->setup->gpio_func[3]); + aic32x4->gpio_func[3]); snd_soc_add_component_controls(component, aic32x4_mfp4, ARRAY_SIZE(aic32x4_mfp4)); } /* MFP5 */ - if (aic32x4->setup->gpio_func[4] != AIC32X4_MFPX_DEFAULT_VALUE) { + if (aic32x4->gpio_func[4] != AIC32X4_MFPX_DEFAULT_VALUE) { snd_soc_component_write(component, AIC32X4_GPIOCTL, - aic32x4->setup->gpio_func[4]); + aic32x4->gpio_func[4]); snd_soc_add_component_controls(component, aic32x4_mfp5, ARRAY_SIZE(aic32x4_mfp5)); } @@ -1016,8 +1013,7 @@ static int aic32x4_component_probe(struct snd_soc_component *component) if (ret) return ret; - if (aic32x4->setup) - aic32x4_setup_gpios(component); + aic32x4_setup_gpios(component); clk_set_parent(clocks[0].clk, clocks[1].clk); clk_set_parent(clocks[2].clk, clocks[3].clk); @@ -1173,8 +1169,7 @@ static int aic32x4_tas2505_component_probe(struct snd_soc_component *component) if (ret) return ret; - if (aic32x4->setup) - aic32x4_setup_gpios(component); + aic32x4_setup_gpios(component); clk_set_parent(clocks[0].clk, clocks[1].clk); clk_set_parent(clocks[2].clk, clocks[3].clk); @@ -1224,14 +1219,8 @@ static const struct snd_soc_component_driver soc_component_dev_aic32x4_tas2505 = static int aic32x4_parse_dt(struct aic32x4_priv *aic32x4, struct device_node *np) { - struct aic32x4_setup_data *aic32x4_setup; int ret; - aic32x4_setup = devm_kzalloc(aic32x4->dev, sizeof(*aic32x4_setup), - GFP_KERNEL); - if (!aic32x4_setup) - return -ENOMEM; - ret = of_property_match_string(np, "clock-names", "mclk"); if (ret < 0) return -EINVAL; @@ -1248,9 +1237,11 @@ static int aic32x4_parse_dt(struct aic32x4_priv *aic32x4, gpiod_set_consumer_name(aic32x4->rstn_gpio, "tlv320aic32x4_rstn"); } - if (of_property_read_u32_array(np, "aic32x4-gpio-func", - aic32x4_setup->gpio_func, 5) >= 0) - aic32x4->setup = aic32x4_setup; + for (int i = 0; i < ARRAY_SIZE(aic32x4->gpio_func); i++) + aic32x4->gpio_func[i] = AIC32X4_MFPX_DEFAULT_VALUE; + of_property_read_u32_array(np, "aic32x4-gpio-func", + aic32x4->gpio_func, ARRAY_SIZE(aic32x4->gpio_func)); + return 0; } -- 2.55.0.229.g6434b31f56-goog