From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E943E41F5FF; Tue, 28 Jul 2026 10:10:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785233451; cv=none; b=iyKnPk3Z6EahgWqqF5W0HAiu/7swU+wj9TYjaR8cWDqOaXbK1UqOYK3pEn3/b2o7ocFSaKqQfMk6OdkATmgK24cjdxQ9Bf6fpIWZQrcIX/jxViu/kr+XZ3oi0hMMvdRDlgGh0bUpIQy4W0vSRnMH8xrnCFPrcUBObECM3xKnDew= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785233451; c=relaxed/simple; bh=71AXrF32hiyI42yflqQmy1aIbb6Uu1vj+Qojl3Fuwso=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=NrpXti9LB67XQhpERdf/LtooSVciZeDD2w6yFKc1LiHh/soKROQj6VGfpRzT5na/nvRXcfMPIg5wJu84hfrEhNLc1q5CuhlSD1dr+21CeEAZsb0gta10ZpRffY+zPWIe7SFufOxMXlyzh1acxJ8Eibp8WsWz0IqmF+qJV6kwh2Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ABQ1g51I; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ABQ1g51I" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2C5FF1F00A3E; Tue, 28 Jul 2026 10:10:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1785233448; bh=C2lC3b1p9wpX1dDqiT/jVML7gi6qkNoMCPmJr3mtY7E=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=ABQ1g51Il/uuahGBZA92Y3+8KO2/SEefyfsrbxSfq4RA+YQv2NZBsruNg0FOfiN51 vdfDWRhnB/1+SfTuoYyDYrS0QIvkE7wtVSp0gYvRq59PwUdDx4VaNsoHbgLfiImmiW FbH5dO8wvyls4B+PGxuCFrikhDAy2izbjSaxn3g0Z3VwOMdPWuYt5IwRgNjHRTLUiD hJJ/K/6bTocqy0j4XkqSJCvT0yHdE2yuAIrY0MHo5PicbTHogjbY+IIpyExZLkgDCW bYX0Gbqf4LgH/VupnNx/QS+NeOhYQCBFktVivgX70k7gjNhZiYc/rN/5n3/sTbQNUB eo9yBAus3nmzA== From: Konrad Dybcio Date: Tue, 28 Jul 2026 12:10:16 +0200 Subject: [PATCH v2 5/5] arm64: dts: qcom: hamoa: Extend QMPPHY description for USB4 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260728-topic-usb4phy-v2-5-5d9dd5149ec7@oss.qualcomm.com> References: <20260728-topic-usb4phy-v2-0-5d9dd5149ec7@oss.qualcomm.com> In-Reply-To: <20260728-topic-usb4phy-v2-0-5d9dd5149ec7@oss.qualcomm.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, usb4-upstream@oss.qualcomm.com, Raghavendra Thoorpu , Mika Westerberg , Sven Peter , Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1785233420; l=2189; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=bT0fXd6kJ0VzXUtEIvKV31ALc3gCZ+MqsJl/PQQkGFM=; b=C7QdoALEosX526pTHFcaG7AYAQ37lCycEsHCIA6ewSC3FcNK8a9YOr0JuzgkSNfnL88xh9Rur T0TKeRI0zPDCSWUw2M21rnLHqmhSM43Witixb4xoRRhg02s7zER/6Na X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio The USB4 part of the QMPPHY requires that one more GCC clock (P2RR2P - PHY-to-Router, Router-to-PHY) is enabled for the PHY to initialize successfully. Describe that. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/hamoa.dtsi | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi index 09527dcf9576..2effc0319a01 100644 --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi @@ -2825,11 +2825,13 @@ usb_1_ss0_qmpphy: phy@fd5000 { clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, - <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, + <&gcc GCC_USB4_0_PHY_P2RR2P_PIPE_CLK>; clock-names = "aux", "ref", "com_aux", - "usb3_pipe"; + "usb3_pipe", + "p2rr2p_pipe"; power-domains = <&gcc GCC_USB_0_PHY_GDSC>; @@ -2896,11 +2898,13 @@ usb_1_ss1_qmpphy: phy@fda000 { clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, <&tcsr TCSR_USB4_1_CLKREF_EN>, <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>, - <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; + <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>, + <&gcc GCC_USB4_1_PHY_P2RR2P_PIPE_CLK>; clock-names = "aux", "ref", "com_aux", - "usb3_pipe"; + "usb3_pipe", + "p2rr2p_pipe"; power-domains = <&gcc GCC_USB_1_PHY_GDSC>; @@ -2967,11 +2971,13 @@ usb_1_ss2_qmpphy: phy@fdf000 { clocks = <&gcc GCC_USB3_TERT_PHY_AUX_CLK>, <&tcsr TCSR_USB4_2_CLKREF_EN>, <&gcc GCC_USB3_TERT_PHY_COM_AUX_CLK>, - <&gcc GCC_USB3_TERT_PHY_PIPE_CLK>; + <&gcc GCC_USB3_TERT_PHY_PIPE_CLK>, + <&gcc GCC_USB4_2_PHY_P2RR2P_PIPE_CLK>; clock-names = "aux", "ref", "com_aux", - "usb3_pipe"; + "usb3_pipe", + "p2rr2p_pipe"; power-domains = <&gcc GCC_USB_2_PHY_GDSC>; -- 2.55.0