From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f200.google.com (mail-pl1-f200.google.com [209.85.214.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3202522579E for ; Tue, 28 Jul 2026 00:44:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.200 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785199442; cv=none; b=pZcn0JxgdHOTswpdUzLzX2eblUVHQA8SEqe/eYrOrFfSTJbQH31SclP/hhEM3N/nK/KSBOmtVCBl3u26VvTtkJT+9yY03baW/yyUg0xlT5wo5R/CWuhH4Lw7jvaUWNlGPGcauuUzb6LPvWHGGcV5k2pAVDwdS7jYXTO8Lq2JHuA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785199442; c=relaxed/simple; bh=KnXgjyjfWrZ1Kav/HM0YRzGa3zLfYclxmj3T9MDdpEY=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=J8qD2qqHGz55IThCPx71GFpwo1d38WEk5IsfmeyrKKlABtNHIk0tAD6WDDDJ5Q6JeU4LWeubLbe6TkR3XNFLBE6pBrvCCEnA4IjIPAjedIYCFgdwpaZctO/z8bfycUYxNOjGaZTilzGFXWk8BeSGEYK5Q3CrujmNA7VZQtOGn/Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=im/K0BzG; arc=none smtp.client-ip=209.85.214.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="im/K0BzG" Received: by mail-pl1-f200.google.com with SMTP id d9443c01a7336-2cfc52ddc55so43508795ad.3 for ; Mon, 27 Jul 2026 17:44:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1785199440; x=1785804240; darn=vger.kernel.org; h=content-type:cc:to:from:subject:message-id:references:mime-version :in-reply-to:date:reply-to:from:to:cc:subject:date:message-id :reply-to:content-type; bh=kq233dhoaDKQgdxaAZop0K9XdHgfgVQqWKzBXz6++L8=; b=im/K0BzGWC/Id+bh5eR/SWYWyiBVDpuMLeS+4P6tf+VaTpdXWVb4WKLuNPWdSsDYLZ bRjh4DFz879Cdo821CGQccz8/aQW33wlkKD4It7phRojkfez69SRZGvHzIqB0wZGVjqy hxgS2Ui90Z3Jv8jyxialYginEs6iNxQ3TkCwsnT5oy6RW51GRYoHzSXztYi+zrz61IeZ 6gebALHH0fJGa8YWvgmt8iDN8PCNWuqPh1zqQV/fQ8q3Z1rgDvEaOHBNhA6MffQXP+0t 1yNLQhR9eNyCR3aKwvFbZsPGlN0Xr393EDEeKh2iM0bGkOpnuLq+0cvB1rB0inm71M2e uCGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1785199440; x=1785804240; h=content-type:cc:to:from:subject:message-id:references:mime-version :in-reply-to:date:reply-to:x-gm-message-state:from:to:cc:subject :date:message-id:reply-to:content-type; bh=kq233dhoaDKQgdxaAZop0K9XdHgfgVQqWKzBXz6++L8=; b=gnsa0Syv6E/ZrcrxHF7aYp4SIeQLlm5hFtiBhVMh7UI2NeHoGC4A8BQKQRliFCDoxn G6a+GziQWuLGuCjaV1ykTOxio3b3sS7bQSwz2/dgwdrBriM6IYOtY2AX+UgUTou1B8Sn KAcDMnelNFmr5zXzPEwI7hz/JjPf29ariPx5mR7AMlAn+Tdaz0KVkMttEecNftEMjSjK nUVy00QHOxEi+tiWy5MqaG7KKloJXXakLuK/QhgB1COD/5M9iUQRkRffGZKK7bk+7sb0 Cz5yyPlq6EHjcQB3/Th0Q/xFkhG5rPddQ8qtphF0IfHF2dbx7CRAza4VCimKITM4WJDx /ERA== X-Forwarded-Encrypted: i=1; AHgh+Rr2VNcibIY2WGaJdy81VdilLDJYatPTo/rTj+R+Ro6NLNakgNTImNwLC5WqTp9p46JXCae0rBc+smSmCCE=@vger.kernel.org X-Gm-Message-State: AOJu0YyXd5OFUv3nv9TGEsYAWKnDPHwzn8l+hh+ouHJF6eao4B1R5hx9 BK++T6G+7scILVDUDNzUZd4AuDHWDnHI2MELlHB4kd6LU/qTutEPf5GSvIMGmmYTG1SYKQ7fk0Q ApyrXqw== X-Received: from plblq13.prod.google.com ([2002:a17:903:144d:b0:2c8:903:9ae7]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:902:d2cf:b0:2c9:97a7:f543 with SMTP id d9443c01a7336-2d015d258a7mr1656135ad.41.1785199440298; Mon, 27 Jul 2026 17:44:00 -0700 (PDT) Reply-To: Sean Christopherson Date: Mon, 27 Jul 2026 17:43:51 -0700 In-Reply-To: <20260728004351.887076-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260728004351.887076-1-seanjc@google.com> X-Mailer: git-send-email 2.55.0.229.g6434b31f56-goog Message-ID: <20260728004351.887076-7-seanjc@google.com> Subject: [PATCH v4 6/6] KVM: selftests: Extend the invalid nVMX guest state test to cover RSM From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Hao Zhang Content-Type: text/plain; charset="UTF-8" From: Hao Zhang Extend the invalid nVMX guest state to cover RSM, i.e. to validate that KVM synthesizes SHUTDOWN for L1 if SMRAM is clobbered with invalid guest state during an L2 => SMI => RSM => L2 sequence. Note, unlike the existing testcase, clobbering SMRAM should result in L1, not L2, getting SHUTDOWN / TRIPLE_FAULT, as RSM is architecturally defined to trigger shutdown if the CPU detects invalid state. Not-yet-signed-off-by: Hao Zhang Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson --- .../kvm/x86/vmx_invalid_nested_guest_state.c | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/tools/testing/selftests/kvm/x86/vmx_invalid_nested_guest_state.c b/tools/testing/selftests/kvm/x86/vmx_invalid_nested_guest_state.c index ab00265d6c94..6f546deb193a 100644 --- a/tools/testing/selftests/kvm/x86/vmx_invalid_nested_guest_state.c +++ b/tools/testing/selftests/kvm/x86/vmx_invalid_nested_guest_state.c @@ -2,6 +2,7 @@ #include "test_util.h" #include "kvm_util.h" #include "processor.h" +#include "smm.h" #include "vmx.h" #include @@ -11,6 +12,22 @@ #define ARBITRARY_IO_PORT 0x80 +/* + * The 64-bit SMRAM state-save area starts at SMBASE + 0xfe00. TR starts at + * offset 0xfe90, and attributes is the second 16-bit field in the descriptor. + */ +#define SMRAM64_TR_ATTRIBUTES_OFFSET 0xfe92 +#define SMRAM_GPA 0x1000000 + +/* + * SMI handler that runs in 16-bit Real Mode. Syncs with L0 via port I/O, then + * executes RSM to trigger the consumption of invalid guest state. + */ +static u8 smi_handler[] = { + 0xe4, ARBITRARY_IO_PORT, /* IN $ARBITRARY_IO_PORT, %al */ + 0x0f, 0xaa, /* RSM */ +}; + static void l2_guest_code(void) { /* @@ -114,9 +131,45 @@ static void test_invalid_l2_guest_state(void) kvm_vm_free(vm); } +static void test_invalid_l2_guest_state_rsm(void) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + u16 *tr_attrs; + + if (!kvm_has_cap(KVM_CAP_X86_SMM)) + return; + + vm = vm_create_and_run_l2(&vcpu); + + /* + * Inject SMI while L2 is active, run the vCPU to get I/O exit from L1, + * then stuff TR in the SMRAM state-save area so that RSM restores + * invalid L2 state. + */ + setup_smram(vm, vcpu, SMRAM_GPA, smi_handler, sizeof(smi_handler)); + inject_smi(vcpu); + + vcpu_run_to_io(vcpu, false); + + /* Clear the present bit in SMRAM to make TR unusable. */ + tr_attrs = addr_gpa2hva(vm, SMRAM_GPA + SMRAM64_TR_ATTRIBUTES_OFFSET); + *tr_attrs &= ~BIT(7); + + vcpu_run(vcpu); + + /* + * For RSM, L1 gets the SHUTDOWN because RSM is architecturally defined + * to result in shutdown if the CPU detects invalid state in SMRAM. + */ + TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_SHUTDOWN); + kvm_vm_free(vm); +} + int main(int argc, char *argv[]) { TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_VMX)); test_invalid_l2_guest_state(); + test_invalid_l2_guest_state_rsm(); } -- 2.55.0.229.g6434b31f56-goog