From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B89B0435535 for ; Tue, 28 Jul 2026 14:30:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=90.155.92.199 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785249025; cv=none; b=JhTK/13ihci4e9QtO/zHS8dUS2CTjIisYjVeBraLuCmheY/QrV64JwFDf/xS4v2eBCWdAW5QfGx/n5xXG3lB4VPXSsEujI2Aj4ksqeR0c8WjX4Oa6sf8jSsuLqbtFbNIc5kpwrBvd7L18/4J4NBlo768q18blxtFVeiu76MHExk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785249025; c=relaxed/simple; bh=SeGENi66jeYdILNwZEUrkAOEW/IGBHrhcms+hijCG1c=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=hOBCX3BCkvwBCjCmj99napC4CR6tga55DyyQzpZm+X1oELbV+3Dourt3dALR0y2mCu9c2bOviXOIZn0mR/GJ+xReiVW7unUWu6iJzsn5JvVnYPWNjeWofqV9qWEzCTKjPPikvbtwJgrF0ZwyT09Du1Q0SqJ7K0fl7JpuJbVvfnc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org; spf=pass smtp.mailfrom=infradead.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b=G3lUtsaM; arc=none smtp.client-ip=90.155.92.199 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=infradead.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=infradead.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="G3lUtsaM" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=oXcJzsx8WNzk3HL2LfGDWHxUKqoTupIjlQLk/UZ0JTU=; b=G3lUtsaMAY/USB8Nmx0fu9PAlG +jyJ+13UhgB585d4aBPFc7GzcDJIswaQ/oxXDTJEm2t8n5bvelpyCcpp2rxgCT6VMoutiI63qIigD PcPW+4npFsVqQNXi1SW4k9gKLuRG6wUF6/U1hTxXv/07fXviz+kyyDG3IGpHSXLsxqUHj/sgAQctO tB2cfhQLFnjOqbqTAg5kG0/715Kck6/q3Qrz9l4d5RouCgxip9a5Ka4r99Bwww+PyPaPNrvn4qTx/ lEKKR7DrNS8kkQOLnv09EicckXITIOfd6+4xtWVM02Jxycfv/1g4TBjXLAx6WgoM2oIe+3ceyl/BH OyP7w76A==; Received: from 77-249-17-252.cable.dynamic.v4.ziggo.nl ([77.249.17.252] helo=noisy.programming.kicks-ass.net) by desiato.infradead.org with esmtpsa (Exim 4.99.2 #2 (Red Hat Linux)) id 1woioy-000000051Fs-3v5R; Tue, 28 Jul 2026 14:30:17 +0000 Received: by noisy.programming.kicks-ass.net (Postfix, from userid 1000) id 0F870300969; Tue, 28 Jul 2026 16:30:16 +0200 (CEST) Date: Tue, 28 Jul 2026 16:30:16 +0200 From: Peter Zijlstra To: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, ada.coupriediaz@arm.com, ardb@kernel.org, catalin.marinas@arm.com, hca@linux.ibm.com, linux-kernel@vger.kernel.org, maz@kernel.org, ruanjinjie@huawei.com, vladimir.murzin@arm.com, will@kernel.org, yang@os.amperecomputing.com Subject: Re: [RFC PATCH 06/13] arm64: percpu: Add infrastructure for preemptible this_cpu_*() ops Message-ID: <20260728143016.GB921102@noisy.programming.kicks-ass.net> References: <20260728123859.2911495-1-mark.rutland@arm.com> <20260728123859.2911495-7-mark.rutland@arm.com> <20260728141958.GV751831@noisy.programming.kicks-ass.net> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260728141958.GV751831@noisy.programming.kicks-ass.net> On Tue, Jul 28, 2026 at 04:19:58PM +0200, Peter Zijlstra wrote: > On Tue, Jul 28, 2026 at 01:38:52PM +0100, Mark Rutland wrote: > > > With the scheme added in this patch, this can be compiled as: > > > > | : > > | mrs x2, sp_el0 > > | mov x4, #0xc80 > > | strh w4, [x2, #20] > > | mrs x4, tpidr_el1 > > | add x3, x0, x4 > > Which it then recomputes, and so is harmless. Here! > > | 1: ldxr x6, [x3] > > | add x6, x6, x1 > > | stxr w5, x6, [x3] > > | cbnz w5, 1b > > If we get here and interrupts happens, we recompute pointlessly, no harm > done. > > Anyway, per this sequence there is no point in ever doing the fixup. So > perhaps give a better example? Nevermind, brain just wasn't working right, when interrupt happens at 'Here!' above, it needs the fixup, irrespective of the atomic type. > > | strh wzr, [x2, #20] > > | ret