From: Caleb James DeLisle <cjd@cjdns.fr>
To: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org,
tsbogend@alpha.franken.de, devicetree@vger.kernel.org,
Caleb James DeLisle <cjd@cjdns.fr>
Subject: [PATCH 0/2] mips: econet: add multi-vpe capability to EN751221
Date: Tue, 28 Jul 2026 18:49:57 +0000 [thread overview]
Message-ID: <20260728184959.102441-1-cjd@cjdns.fr> (raw)
The EN751221 is a MIPS 34Kc so it supports MIPS_SMP_MT, but until now
this was disabled because to enable it requires the interrupt
controller to be in VEIC mode and previously only cascading mode was
supported by the interrupt controller driver. Since
commit 2ee2a685ee83 ("irqchip/econet-en751221: Support MIPS 34Kc VEIC mode")
the intc driver now supports VEIC mode. Add SMP_MT to init.c and
update the Device Tree to recognize dual VPE.
Caleb James DeLisle (2):
mips: econet: add multi-vpe capability to EN751221
mips: dts: econet: Describe dual-VPE 34Kc processor
arch/mips/boot/dts/econet/en751221.dtsi | 7 +++++
arch/mips/econet/Kconfig | 4 +--
arch/mips/econet/init.c | 42 ++++++++++++++++++++++++-
3 files changed, 49 insertions(+), 4 deletions(-)
base-commit: 27c61f8565a438b2d1dea6f6a47af0e6dc12c112
--
2.39.5
next reply other threads:[~2026-07-28 18:50 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-28 18:49 Caleb James DeLisle [this message]
2026-07-28 18:49 ` [PATCH 1/2] " Caleb James DeLisle
2026-07-28 18:49 ` [PATCH 2/2] mips: dts: econet: Describe dual-VPE 34Kc processor Caleb James DeLisle
2026-08-03 13:14 ` [PATCH 0/2] mips: econet: add multi-vpe capability to EN751221 Thomas Bogendoerfer
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