From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1E8538B7BA for ; Wed, 29 Jul 2026 02:57:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.11 ARC-Seal:i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785293851; cv=pass; b=qNBukeyY/H01RvUMtTA2f9a6QquH5E1rwchijZkDzPqTtPtfeayPwat0gvs6re/zPxlpFbSCk/HxNBdJ5zrYIZcBk6Kdd8ePRHoT3q5pQccw/opsVQXlvViM+RLHTQ2+ZU9N0jn5jfvuMfjEYf64wG02dZqX8Wzi8ZkHb/SA8xA= ARC-Message-Signature:i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785293851; c=relaxed/simple; bh=6iLiszGglw9IGdCLHufsdy/h+OCU2n77y5FkSXCvJ9Y=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GQJugP1VpWwJpSEfJTHXe1KVQ1+xtIK8kVcSjfRFUpjUjZ/3XrHej+MdwejiSn5L1eu/VSWvuSlXqyuDQDnbvZE9+JOn1Ys+EsfTMzs/RCGCb0X4qhZoI3zAzf0A0Wj9HELWLBpEIW+bpyFkilgcfJ6JOp9g1BbmdpX7R08r4Yo= ARC-Authentication-Results:i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b=CVIy3xt4; arc=pass smtp.client-ip=136.143.188.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b="CVIy3xt4" ARC-Seal: i=1; a=rsa-sha256; t=1785293699; cv=none; d=zohomail.com; s=zohoarc; b=m/wQ7nqthThPIWKYOyqPX+iAuQZ9LAY2S/BeSq9v3RApw9T8MmRJLhcfRg/mX0pkgLUnMrK5qUcVBgWIOj3Brxy4p619u4Jw96Tsa5kfTWnQavPEMzVlIMY2cr7sadGMS5VOI6xUlu30ydkqA01ZgSez1GWqlwz9rvpY9pB79HE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1785293699; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=roa9aGQFh0eqti0cxf4vab8pH+6qbvw31FCU884l9ek=; b=NS0VHB72S4uL8Mdn1oKVwxycpS5vStAOewyIqePrrTJJBB7Y6MWstrEDKBmeV4VmqSPxo010IDAE/ZcHtThBmCMcWTgFZustDd+90hW5HkyyiIy1pJWADi3PN6XalL828ysEJevi0txWN5LyaLXKfC1tXaYzQS+jjuF1JBN0P4Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=adrian.larumbe@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1785293699; s=zohomail; d=collabora.com; i=adrian.larumbe@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=roa9aGQFh0eqti0cxf4vab8pH+6qbvw31FCU884l9ek=; b=CVIy3xt4pdGTsUiHwDzVt7JIt8XOsFvxFDOwp8vy7MQ/QqtmExZcFghk5U9LG8fN OJ3Mx6e2LXrGbJs0rZScEPJjaHgWi9kkPuVUXvshhzymi+qrAE21guJiS3aRYDCdYOj jNvTYlr4aB8lVZwx4wWkHksrN2XByz9cQ+BbLiaY= Received: by mx.zohomail.com with SMTPS id 1785293697917896.9563487815353; Tue, 28 Jul 2026 19:54:57 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Wed, 29 Jul 2026 03:54:19 +0100 Subject: [PATCH v4 07/13] drm/panfrost: Sync with IRQ before MMU disable and reset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <20260729-claude-fixes-v4-7-01968f2ec77a@collabora.com> References: <20260729-claude-fixes-v4-0-01968f2ec77a@collabora.com> In-Reply-To: <20260729-claude-fixes-v4-0-01968f2ec77a@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1704; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=6iLiszGglw9IGdCLHufsdy/h+OCU2n77y5FkSXCvJ9Y=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqaWtXDyFAnjBZv6y+Ay348/uyXsXcabmoOKsxq 0TT8q6pNw+JAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCamlrVwAKCRAOJn5M7lND PfXgDACLtT0fxavwBF2Mp9EAGieAQbt2y/bx58R4QsDskzDHPxXdqdEJOwEf0VKrFVt9tH3TvRW CR+MIKVIkIf17BL5RcVdmxVXdMlrP+s3ylPNs/IYqEXShOUWChOO1Spfsm4+h+kfB5hksH7Z9EP 3g8ipWx+9GXwECIRaM/KP42dctcLN1r7wE+VR5ce5LzXc3h0dcqx8bqB+UrMo6IYtLDILlipJbF JdVDham/1q+lBJjwQWC7EvqOWlUKbYCS+bbJ1YpPOzMV1hNYYF96TPUmqAPIb2rV81ja+SxdEzT A8R26n+w73JrvtxpiTOzj3KkGZgCkm4nnCiNL48V9E56i/MZMH+71KGOEGW+khvgH805/y3Lo0P OJXKPKL0twqEBGi8+X43jmG2oCUE5keik0YB3jV8hqFvfhB2effGiyYA5rdgf7wK5h3rmwXv0Sx EgsctMbxfZdmRHNouq+TcAPdDgesA7j+RdrB+imAwZzsWeg3lOuPYf+LhqPRVEahLswac= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D There was a pitfall of the MMU threaded IRQ handler accessing HW registers after a spurious interrupt at the same time the device is being premature taking down because of a failed probe sequence. Let's make sure MMU IRQ's are marked suspended and synchronised with before unwinding further. Also, during a device reset, make sure we also sync with the MMU IRQ handler so that AS aren't clobbered while a map operation is ongoing. Signed-off-by: Adrián Larumbe --- drivers/gpu/drm/panfrost/panfrost_mmu.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c index aad0cd31516d..2d0ef6575f06 100644 --- a/drivers/gpu/drm/panfrost/panfrost_mmu.c +++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c @@ -347,6 +347,7 @@ void panfrost_mmu_reset(struct panfrost_device *pfdev) struct panfrost_mmu *mmu, *mmu_tmp; clear_bit(PANFROST_COMP_BIT_MMU, pfdev->is_suspended); + synchronize_irq(pfdev->mmu_irq); spin_lock(&pfdev->as_lock); @@ -983,11 +984,6 @@ int panfrost_mmu_init(struct panfrost_device *pfdev) return 0; } -void panfrost_mmu_fini(struct panfrost_device *pfdev) -{ - mmu_write(pfdev, MMU_INT_MASK, 0); -} - void panfrost_mmu_suspend_irq(struct panfrost_device *pfdev) { set_bit(PANFROST_COMP_BIT_MMU, pfdev->is_suspended); @@ -995,3 +991,8 @@ void panfrost_mmu_suspend_irq(struct panfrost_device *pfdev) mmu_write(pfdev, MMU_INT_MASK, 0); synchronize_irq(pfdev->mmu_irq); } + +void panfrost_mmu_fini(struct panfrost_device *pfdev) +{ + panfrost_mmu_suspend_irq(pfdev); +} -- 2.55.0