From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A57BC306754 for ; Wed, 29 Jul 2026 06:21:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal:i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785306075; cv=pass; b=u8zZuV2F4eWMzvvI5/pkUXWYwEjMk7kTRKXR3zhJQBhVWwskNb//Ds/JLFyRSQBy6PP+gK68Uaz9m2p6mhsmE89+wV2DtbYQE5MgadML7A5Rwcby1/Vc2V9d5ECfqfFO/xxCp39eGoZ2y6V2azS8u+qEeLrd+DeX4RFlaw1QceQ= ARC-Message-Signature:i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785306075; c=relaxed/simple; bh=qHA0Qmre2rs9hvLre3ZtDPVqEbWv4KPBHH6p2C+da5A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=reY7K+lGdqG6zsNYWj/T/CvtPK1RU8A30R+QLqqcjo+pgUEh9gPS+mNKOkXZjdmHO+PdZy/fB1zvKTSxPH4TjR6/rn1TIWLJeLbHwElL+JmQb8NXk+t3CaL4N2PGdmkwTijIcbzP4D5RzddwxG23ARoVuQ/VJPQicrytaVXAfqo= ARC-Authentication-Results:i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b=d7IaOg2g; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b="d7IaOg2g" ARC-Seal: i=1; a=rsa-sha256; t=1785306022; cv=none; d=zohomail.com; s=zohoarc; b=hTm6mJgKTmYN4jtSU7rE+fSb8AFUmpcGVy99koq5SMVCWOjLgeXTA0FhmhTSpMDI6K7fi1wnB8F5wwSCg3sI1478O3Na34knYw8cXjuLnoOliZ8/BsDR+GpNZ++i2jjy1VEOAp1fimJMZ2LAl+rtx3+FRBAIeDy0xiDmYlttC6k= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1785306022; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=i1bEwzpAqbXOusu5i/g7M0H3+pJayV2PwHxpSPHzwqY=; b=hKKZfjr7hm/GcNCcAS6pEEW/mVaJmxQq5blxeHEwS0lPiQEY4glRTacCAw0fTyxzz5QHtLjeUk5RC3Vzz7oQb/Yl8p+8tqazMJnM/C6LbrMHqoiYJAzFeHmwlQtOqBlbXfRohigX31lnD2vUmnzBfdwkFiXT0znYKwSQ2XSzHn4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1785306022; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=i1bEwzpAqbXOusu5i/g7M0H3+pJayV2PwHxpSPHzwqY=; b=d7IaOg2gWurXtDXl+63f3tMNXPHhfkVzDJGQMwBQK0T04XXdGKVuCIoe3IdUhb7K PpuHEws207ks4ZcoG6oooMGEmu0zPKiwwdQucW7DGm2u2IiWDI6PnGsYvA0JJxQNqmq XHwsNIZDVPsFLLBz3X2WdpgM/fQ9LSTYcXG2GlrU= Received: by mx.zohomail.com with SMTPS id 1785306019891954.3081043448323; Tue, 28 Jul 2026 23:20:19 -0700 (PDT) From: Nicolas Frattaroli Date: Wed, 29 Jul 2026 08:19:50 +0200 Subject: [PATCH 2/3] drm/panthor: Revisit reqs_lock handling in flush/reset paths Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260729-panthor-cache-flush-fix-v1-2-205921ed3c81@collabora.com> References: <20260729-panthor-cache-flush-fix-v1-0-205921ed3c81@collabora.com> In-Reply-To: <20260729-panthor-cache-flush-fix-v1-0-205921ed3c81@collabora.com> To: Ingo Molnar , Peter Zijlstra , Juri Lelli , Vincent Guittot , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , K Prateek Nayak , Boris Brezillon , Steven Price , Liviu Dudau , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Grant Likely , Heiko Stuebner Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, kernel@collabora.com, Nicolas Frattaroli X-Mailer: b4 0.15.2 panthor_gpu_flush_caches() and panthor_gpu_soft_reset() would read (and even reset) the contents of the pending_reqs register outside of holding the reqs_lock. Additionally, when it did hold the lock, it did so with the irqsave/irqrestore variants, even though the spinlock was never acquired in an atomic context, just the threaded handler. Use the new wait_event_lock_timeout() macro to check pending_reqs under the lock, and only do so without disabling interrupts. Fixes: 5cd894e258c4 ("drm/panthor: Add the GPU logical block") Signed-off-by: Nicolas Frattaroli --- drivers/gpu/drm/panthor/panthor_gpu.c | 25 +++++++++++-------------- 1 file changed, 11 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/panthor/panthor_gpu.c b/drivers/gpu/drm/panthor/panthor_gpu.c index c013d6bf9a59..f015bde80abf 100644 --- a/drivers/gpu/drm/panthor/panthor_gpu.c +++ b/drivers/gpu/drm/panthor/panthor_gpu.c @@ -330,35 +330,34 @@ int panthor_gpu_flush_caches(struct panthor_device *ptdev, u32 l2, u32 lsc, u32 other) { struct panthor_gpu *gpu = ptdev->gpu; - unsigned long flags; int ret = 0; /* Serialize cache flush operations. */ guard(mutex)(&ptdev->gpu->cache_flush_lock); - spin_lock_irqsave(&ptdev->gpu->reqs_lock, flags); + spin_lock(&ptdev->gpu->reqs_lock); if (!(ptdev->gpu->pending_reqs & GPU_IRQ_CLEAN_CACHES_COMPLETED)) { ptdev->gpu->pending_reqs |= GPU_IRQ_CLEAN_CACHES_COMPLETED; gpu_write(gpu->iomem, GPU_CMD, GPU_FLUSH_CACHES(l2, lsc, other)); } else { ret = -EIO; } - spin_unlock_irqrestore(&ptdev->gpu->reqs_lock, flags); - if (ret) + if (ret) { + spin_unlock(&ptdev->gpu->reqs_lock); return ret; + } - if (!wait_event_timeout(ptdev->gpu->reqs_acked, + if (!wait_event_lock_timeout(ptdev->gpu->reqs_acked, !(ptdev->gpu->pending_reqs & GPU_IRQ_CLEAN_CACHES_COMPLETED), - msecs_to_jiffies(100))) { - spin_lock_irqsave(&ptdev->gpu->reqs_lock, flags); + ptdev->gpu->reqs_lock, msecs_to_jiffies(100))) { if ((ptdev->gpu->pending_reqs & GPU_IRQ_CLEAN_CACHES_COMPLETED) != 0 && !(gpu_read(gpu->irq.iomem, INT_RAWSTAT) & GPU_IRQ_CLEAN_CACHES_COMPLETED)) ret = -ETIMEDOUT; else ptdev->gpu->pending_reqs &= ~GPU_IRQ_CLEAN_CACHES_COMPLETED; - spin_unlock_irqrestore(&ptdev->gpu->reqs_lock, flags); } + spin_unlock(&ptdev->gpu->reqs_lock); if (ret) { panthor_device_schedule_reset(ptdev); @@ -378,27 +377,25 @@ int panthor_gpu_soft_reset(struct panthor_device *ptdev) { struct panthor_gpu *gpu = ptdev->gpu; bool timedout = false; - unsigned long flags; - spin_lock_irqsave(&ptdev->gpu->reqs_lock, flags); + guard(spinlock)(&ptdev->gpu->reqs_lock); + if (!drm_WARN_ON(&ptdev->base, ptdev->gpu->pending_reqs & GPU_IRQ_RESET_COMPLETED)) { ptdev->gpu->pending_reqs |= GPU_IRQ_RESET_COMPLETED; gpu_write(gpu->irq.iomem, INT_CLEAR, GPU_IRQ_RESET_COMPLETED); gpu_write(gpu->iomem, GPU_CMD, GPU_SOFT_RESET); } - spin_unlock_irqrestore(&ptdev->gpu->reqs_lock, flags); - if (!wait_event_timeout(ptdev->gpu->reqs_acked, + if (!wait_event_lock_timeout(ptdev->gpu->reqs_acked, !(ptdev->gpu->pending_reqs & GPU_IRQ_RESET_COMPLETED), + ptdev->gpu->reqs_lock, msecs_to_jiffies(100))) { - spin_lock_irqsave(&ptdev->gpu->reqs_lock, flags); if ((ptdev->gpu->pending_reqs & GPU_IRQ_RESET_COMPLETED) != 0 && !(gpu_read(gpu->irq.iomem, INT_RAWSTAT) & GPU_IRQ_RESET_COMPLETED)) timedout = true; else ptdev->gpu->pending_reqs &= ~GPU_IRQ_RESET_COMPLETED; - spin_unlock_irqrestore(&ptdev->gpu->reqs_lock, flags); } if (timedout) { -- 2.55.0