From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 40D5147FB07 for ; Wed, 29 Jul 2026 12:25:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785327956; cv=none; b=Y4/hfpA3XTAJqKb1QYSSkis4DATr0giK232eGiBF9Sx11eO2mLxkkNpA/81HDxKJFI92vsTU9HkarMu6WOAD/jt3JKpmf9wdXHiEiro5P1x9kVMO99JGMj2uj2vY01NcNbyHg/8k9PbpapZaXQ3d4vmmGH0M9lwtGDH65QnlT1E= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785327956; c=relaxed/simple; bh=ZSU1qD/xdKoUglWGdMm1G3OWTBhkOp/K5aayHoi+YUk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JC6Q9LgO4pMbWfQoyvypPbDaxTfKVogHFRVUI5zmw3e7Z0oW9VNaR6SVOpqpHd/xia834RSqCwxl3HTDyS0MfrUuS7xrHXCv5vnFlNJbORWY2NQwKelCVkKIwpO4OG3aNJwso/WJWRi646UreYNzPWyEf9BlFXsOu2XuCgZ2Nng= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=qKHgKtfE; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="qKHgKtfE" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AEBF31688; Wed, 29 Jul 2026 05:25:50 -0700 (PDT) Received: from a085714.blr.arm.com (a085714.arm.com [10.164.19.28]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 341423F66F; Wed, 29 Jul 2026 05:25:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1785327954; bh=ZSU1qD/xdKoUglWGdMm1G3OWTBhkOp/K5aayHoi+YUk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qKHgKtfEJ0/ufKbFIh+X8HztvsiUuDvew2Ymb3Tnzga1Dmz6p1EkcNK4ggFUPjzhX xgokij30w9ldYZCcemBYhwOILeib4Q5bjE7fBXk/OkuPsscSvAoEDhehJhYh0AKZiz vY1H3YjiuHf7bZoBCkpd44vgOkvAkLQ+eLr9fWdk= From: Anshuman Khandual To: linux-mm@kvack.org, linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Lorenzo Stoakes , Andrew Morton , David Hildenbrand , Mike Rapoport , Linu Cherian , linux-kernel@vger.kernel.org Subject: [PATCH 11/17] arm64/mm: Enable fixmap with 5 level page table Date: Wed, 29 Jul 2026 17:54:46 +0530 Message-ID: <20260729122452.3797443-12-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260729122452.3797443-1-anshuman.khandual@arm.com> References: <20260729122452.3797443-1-anshuman.khandual@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit FEAT_D128 halves PTRS_PER_PXX thus shrinking the VA range coverage for each page table level. Hence in order to preserve all existing VA range configurations, some geometry now need to become 5-level. Since fixmap is used to build and manipulate page tables early on during boot the mapping must also gain that additional level which was not required earlier. Enable fixmap with 5 level page table when required. This creates table entries at the PGD level. Add a fallback stub for pgd_page_paddr() when (PGTBALE_LEVELS <= 4) which helps in intercepting any unintended usage. Cc: Catalin Marinas Cc: Will Deacon Cc: Ryan Roberts Cc: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/pgtable.h | 1 + arch/arm64/mm/fixmap.c | 18 +++++++++++++++--- 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 2270a3e4cc13..50d673474f47 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -1232,6 +1232,7 @@ static inline p4d_t *p4d_offset_kimg(pgd_t *pgdp, u64 addr) #else static inline bool pgtable_l5_enabled(void) { return false; } +#define pgd_page_paddr(pgd) ({ BUILD_BUG(); 0; }) #define p4d_index(addr) (((addr) >> P4D_SHIFT) & (PTRS_PER_P4D - 1)) diff --git a/arch/arm64/mm/fixmap.c b/arch/arm64/mm/fixmap.c index 2a0fe0b0f771..5512521fef8f 100644 --- a/arch/arm64/mm/fixmap.c +++ b/arch/arm64/mm/fixmap.c @@ -34,6 +34,7 @@ static_assert(NR_BM_PMD_TABLES == 1); static pte_t bm_pte[NR_BM_PTE_TABLES][PTRS_PER_PTE] __bss_pgtbl; static pmd_t bm_pmd[PTRS_PER_PMD] __bss_pgtbl __maybe_unused; static pud_t bm_pud[PTRS_PER_PUD] __bss_pgtbl __maybe_unused; +static p4d_t bm_p4d[PTRS_PER_P4D] __bss_pgtbl __maybe_unused; static inline pte_t *fixmap_pte(unsigned long addr) { @@ -95,6 +96,19 @@ static void __init early_fixmap_init_pud(p4d_t *p4dp, unsigned long addr, early_fixmap_init_pmd(pudp, addr, end); } +static void __init early_fixmap_init_p4d(pgd_t *pgdp, unsigned long addr, + unsigned long end) +{ + pgd_t pgd = pgdp_get(pgdp); + p4d_t *p4dp; + + if (pgd_none(pgd)) + __pgd_populate(pgdp, __pa_symbol(bm_p4d), + PGD_TYPE_TABLE | PGD_TABLE_AF); + p4dp = p4d_offset_kimg(pgdp, addr); + early_fixmap_init_pud(p4dp, addr, end); +} + /* * The p*d_populate functions call virt_to_phys implicitly so they can't be used * directly on kernel symbols (bm_p*d). This function is called too early to use @@ -107,9 +121,7 @@ void __init early_fixmap_init(void) unsigned long end = FIXADDR_TOP; pgd_t *pgdp = pgd_offset_k(addr); - p4d_t *p4dp = p4d_offset_kimg(pgdp, addr); - - early_fixmap_init_pud(p4dp, addr, end); + early_fixmap_init_p4d(pgdp, addr, end); } /* -- 2.43.0