From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1181D481675 for ; Wed, 29 Jul 2026 12:26:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785327982; cv=none; b=evIJHOHC8Z+h2x7HYyW1kzPH5iB2pBpReUFSsO12uHnKsem8YB9tcmRJ0FchajMK0W8KAyk1HxedfMRXtf7+U9DWOJ5a3qE2Ly+nuHC/GJzOeu9SrcygoDQKXGW8NMpvFkPDw880upxCzkTrap2BSkP4dluzyprkOKgXEmNEizA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785327982; c=relaxed/simple; bh=M2ps/0zfUAQBr8mTpjkLtUW0+CfbGBqydB+0Or/9/Lg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Otckj/oqxmKtgAp5hUxA58i6wC3SuWWvnyjcdXLBxV/1XAywHHxvq5XhBx+7qJyY85MZyhJEF+Tjq+xnIHrGtzHm9J9WErQEgOw3uHWvv7aSjulKwSX/6GTkXAmyiaxrcxaWloA4gc6i98P9t0hKu7Tdt949C6CIj7P4n1LO/Co= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=s67r0/xD; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="s67r0/xD" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 83E05168F; Wed, 29 Jul 2026 05:26:15 -0700 (PDT) Received: from a085714.blr.arm.com (a085714.arm.com [10.164.19.28]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0B5153FA1F; Wed, 29 Jul 2026 05:26:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1785327979; bh=M2ps/0zfUAQBr8mTpjkLtUW0+CfbGBqydB+0Or/9/Lg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=s67r0/xD72kclPDh9SmJEMUoTLUiZAEmItMV562/z0Xu6NVG5VAPo/wXYLoVJga2o k7OoO5MI3U2AaN4WbbcMkqk/uBph/b4pkZOms7lF02ZRkW/M3cdJ0N/kjt6ej3Sz21 TAQqFCE6T6YgK7P17Zf0WP8D7nHkPyHeqn3zxT5w= From: Anshuman Khandual To: linux-mm@kvack.org, linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Lorenzo Stoakes , Andrew Morton , David Hildenbrand , Mike Rapoport , Linu Cherian , linux-kernel@vger.kernel.org Subject: [PATCH 17/17] arm64/mm: Make ARM64_D128 selectable Date: Wed, 29 Jul 2026 17:54:52 +0530 Message-ID: <20260729122452.3797443-18-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260729122452.3797443-1-anshuman.khandual@arm.com> References: <20260729122452.3797443-1-anshuman.khandual@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit All required changes are already in place including the TLBIP instruction support for enabling D128 translation. Just make this new ARM64_D128 user selectable, after ensuring necessary tools chain support required for the new instructions being used for D128. Cc: Catalin Marinas Cc: Will Deacon Cc: Ryan Roberts Cc: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- arch/arm64/Kconfig | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 8459d43afd45..6c88906d48ec 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -275,6 +275,10 @@ config GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS def_bool CC_IS_GCC depends on $(cc-option,-fpatchable-function-entry=2) +config CC_SUPPORTS_LSE128 + def_bool CC_IS_GCC + depends on $(cc-option, -march=armv8.1-a+lse128) + config 64BIT def_bool y @@ -2249,8 +2253,18 @@ endmenu # "ARMv8.9 architectural features" menu "ARMv9.3 architectural features" +config AS_HAS_ARMV9_3 + def_bool $(cc-option,-Wa$(comma)-march=armv9.3-a) + config ARM64_D128 - bool + bool "Enable support for 128 bit page table (FEAT_D128)" + depends on ARCH_SUPPORTS_INT128 + depends on CC_SUPPORTS_LSE128 + depends on AS_HAS_ARMV9_3 + depends on EXPERT + depends on !VIRTUALIZATION + depends on !KASAN + depends on !UNMAP_KERNEL_AT_EL0 default n help ARMv9.3 introduces FEAT_D128, which provides a 128 bit page -- 2.43.0