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Wed, 29 Jul 2026 06:30:11 -0700 (PDT) Received: from chromium.org ([174.51.25.52]) by smtp.gmail.com with ESMTPSA id 5614622812f47-4ad6ef5d650sm1712932b6e.9.2026.07.29.06.30.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Jul 2026 06:30:09 -0700 (PDT) From: Simon Glass To: Linus Walleij Cc: Krzysztof Kozlowski , Heiko Stuebner , Rob Herring , devicetree@vger.kernel.org, Jonas Karlman , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Conor Dooley , linux-rockchip@lists.infradead.org, Simon Glass , Bartosz Golaszewski , Jeffy Chen , Ye Zhang , huang lin , linux-kernel@vger.kernel.org Subject: [PATCH v3 0/4] pinctrl: Add support for the Rockchip RV1106 Date: Wed, 29 Jul 2026 07:27:24 -0600 Message-ID: <20260729132736.3807082-1-sjg@chromium.org> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series adds pinctrl support for the Rockchip RV1106 and its RV1103 package variant, split out from the initial RV1106 enablement series [1] following feedback to submit per subsystem. On this SoC each GPIO bank has a dedicated IO control (IOC) register block, unlike earlier Rockchip designs where the registers of all banks share a GRF region. Following Jonas's review of v1, each bank node now references the syscon for its own IOC block through a rockchip,grf phandle and the driver uses a separate regmap per bank, so no regmap crosses a block boundary. This v3 is tested on a Luckfox Pico Mini B (RV1103): pinctrl and the four GPIO banks probe, and the sdmmc pinctrl state is applied through the per-bank IOC regmaps, with the SD card working. The corresponding devicetree changes are part of the main RV1106 series, which goes through the Rockchip tree. [1] https://patchwork.kernel.org/project/linux-rockchip/list/?series=1122658 Changes in v3: - Add new patch moving the drive-strength decoding to the get function - Declare the 8-bit level drive type on the banks so that reads decode correctly - Return an error from the iomux functions when a bank has no IOC regmap, rather than falling back to the shared regmap Changes in v2: - Add new patch for the per-bank IOC reference - Use a separate IOC regmap per bank, taken from the rockchip,grf phandle of each bank node and identified by the gpio alias, with block-relative register offsets - Reject drive-strength requests for GPIO0 pins above 6, which have no drive-strength registers - Specify only the first iomux offset for each bank, letting the driver calculate the increments Simon Glass (4): pinctrl: rockchip: Decode drive strength in the get function dt-bindings: gpio: rockchip,gpio-bank: Add rockchip,grf property dt-bindings: pinctrl: rockchip: Add RV1106 compatible pinctrl: rockchip: Add RV1106 pinctrl support .../bindings/gpio/rockchip,gpio-bank.yaml | 7 + .../bindings/pinctrl/rockchip,pinctrl.yaml | 1 + drivers/pinctrl/pinctrl-rockchip.c | 230 ++++++++++++++++-- drivers/pinctrl/pinctrl-rockchip.h | 4 + 4 files changed, 223 insertions(+), 19 deletions(-) --- base-commit: fc02acf6ac0ccde0c805c2daa9148683cdd01ba8 branch: rv1106b3 -- 2.43.0