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Thu, 30 Jul 2026 02:24:14 -0700 (PDT) X-Received: by 2002:a05:622a:8d:b0:51a:8c97:fb91 with SMTP id d75a77b69052e-52b386ef782mr17774771cf.58.1785403453684; Thu, 30 Jul 2026 02:24:13 -0700 (PDT) Received: from QCOM-eG0v1AUPpu.na.qualcomm.com ([2a01:e0a:830:450:61cd:dcd3:c61a:ac3c]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6a07d3831basm411483a12.15.2026.07.30.02.24.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Jul 2026 02:24:12 -0700 (PDT) From: Loic Poulain Date: Thu, 30 Jul 2026 11:24:09 +0200 Subject: [PATCH v3 1/4] media: qcom: camss: Add PM clock support and integrate with runtime PM Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260730-camss-version-v3-1-74a87302dd9f@oss.qualcomm.com> References: <20260730-camss-version-v3-0-74a87302dd9f@oss.qualcomm.com> In-Reply-To: <20260730-camss-version-v3-0-74a87302dd9f@oss.qualcomm.com> To: Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Loic Poulain , Frank Li X-Mailer: b4 0.14.2 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzMwMDA2OSBTYWx0ZWRfX6ST0aBQY/yB9 lpHdsW+DYk1/+YcpVQkh67xN2evQ14XTUIn/Z98Icb9n6JCBJiIghwfitPZ8pT0iaERrlBKw1Pa OK8jWNkhEok58WxoLCr+9TcaOjDfVyAz82ZE4zT0ihSsblh1P2LAbHIM5pbIwv46e+s8lei9gqK bHs+LHcrx3nf5mqaxgviyaI2zMEQcPrtLYlbeLgDhx7SzDBUNyP9v1VkfFcSpNL9oQPoQxign1g r27GUU4bNkuK5V1nZaKSquLojNMlCWZwV5wIx0/QOSltjZbuyO1hWFzoFr758Q1NkexseNt4eWo x1wri5J5JGjZS+zeFCvu5aqr9xP6sbR2CdpweRnwNmebMwnuisaBFy/osjqLjbOyQXMo+sMxKRx dXmH6oa+HhMfKSa4VWVLZ19TSqGKqzSDUwv3rRY+Ptwc+riAulIm0GwGMPljkZKEhqzG/TUyUbh WJ9Xi7iOofmsMT933AA== X-Authority-Analysis: v=2.4 cv=O7UJeh9W c=1 sm=1 tr=0 ts=6a6b183e cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=KKAkSRfTAAAA:8 a=8AirrxEcAAAA:8 a=EUspDBNiAAAA:8 a=KmNvnciZBadtvzOit0AA:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 a=cvBusfyB2V15izCimMoJ:22 a=ST-jHhOKWsTCqRlWije3:22 X-Proofpoint-ORIG-GUID: clESgu5pfKZyreolHTdaGI2quaQdD18k X-Proofpoint-Spam-Info: AW1haW4tMjYwNzMwMDA2OSBTYWx0ZWRfX4jCnbQu7pSoe nXH5J8qKJ7Yqp5HLxpGPwe+qwxPIyE3XNPl+mir9sJCHPGXv2qyc35jAHlkWlksj/ATjQNGX3ZD hPCZlfGD7cmW8Xdf8I7jZb2q4rb82wA= X-Proofpoint-GUID: clESgu5pfKZyreolHTdaGI2quaQdD18k X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-30_02,2026-07-29_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 impostorscore=0 clxscore=1015 phishscore=0 malwarescore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607300069 Add optional PM clock support to the CAMSS driver using the PM clock framework. This allows CAMSS clocks to be registered once and automatically managed during runtime suspend and resume. This is especially useful for global CAMSS clocks that are shared across multiple CAMSS subblocks. This avoids the need for each subblock to reference and manage the shared clocks individually. A typical example is the set of clocks in the top_group, which may be used by CSID, PHY, CCI, and other CAMSS blocks. Introduce a small PM clock descriptor table in the CAMSS resources structure to describe clocks and their optional rates. Initialize these clocks at probe time and delegate clock ownership to the PM core. Hook PM clock handling into the runtime PM callbacks to ensure clocks are properly suspended and resumed alongside power domains and ICC paths. Reviewed-by: Bryan O'Donoghue Reviewed-by: Frank Li Signed-off-by: Loic Poulain --- drivers/media/platform/qcom/camss/camss.c | 46 +++++++++++++++++++++++++++++++ drivers/media/platform/qcom/camss/camss.h | 1 + 2 files changed, 47 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 2123f6388e3d7eafe669efd6b033e22d8eb5cf79..36534f5b496cf30f02464cf2268f0cba5896501f 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include @@ -5346,6 +5347,37 @@ static void camss_genpd_cleanup(struct camss *camss) dev_pm_domain_detach(camss->genpd, true); } +/* + * camss_init_pm_clks - register shared CAMSS clocks with the PM clock framework + * + * Clocks listed in res->pm_clks are shared across all CAMSS sub-devices (e.g. + * top_ahb, axi). They are managed automatically by the PM framework. + */ +static int camss_init_pm_clks(struct camss *camss) +{ + struct device *dev = camss->dev; + unsigned int i; + int ret; + + if (!camss->res->pm_clks[0]) + return 0; + + ret = devm_pm_clk_create(dev); + if (ret) + return ret; + + for (i = 0; i < CAMSS_RES_MAX && camss->res->pm_clks[i]; i++) { + ret = pm_clk_add(dev, camss->res->pm_clks[i]); + if (ret) { + dev_err(dev, "failed to add pm_clk %s: %d\n", + camss->res->pm_clks[i], ret); + return ret; + } + } + + return 0; +} + /* * camss_probe - Probe CAMSS platform device * @pdev: Pointer to CAMSS platform device @@ -5434,6 +5466,10 @@ static int camss_probe(struct platform_device *pdev) pm_runtime_enable(dev); + ret = camss_init_pm_clks(camss); + if (ret) + goto err_v4l2_device_unregister; + ret = camss_parse_ports(camss); if (ret < 0) goto err_v4l2_device_unregister; @@ -5775,7 +5811,11 @@ static int __maybe_unused camss_runtime_suspend(struct device *dev) return ret; } +#if IS_ENABLED(CONFIG_PM_CLK) + return pm_clk_suspend(dev); +#else return 0; +#endif } static int __maybe_unused camss_runtime_resume(struct device *dev) @@ -5785,6 +5825,12 @@ static int __maybe_unused camss_runtime_resume(struct device *dev) int i; int ret; +#if IS_ENABLED(CONFIG_PM_CLK) + ret = pm_clk_resume(dev); + if (ret) + return ret; +#endif + for (i = 0; i < camss->res->icc_path_num; i++) { ret = icc_set_bw(camss->icc_path[i], icc_res[i].icc_bw_tbl.avg, diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h index 93d691c8ac63b2a47dbb234856b627d8911a1851..fe5fe25d5f18d8a3ce35b48077a975f1453c341f 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -107,6 +107,7 @@ enum icc_count { struct camss_resources { enum camss_version version; const char *pd_name; + const char *pm_clks[CAMSS_RES_MAX]; const struct camss_subdev_resources *csiphy_res; const struct camss_subdev_resources *tpg_res; const struct camss_subdev_resources *csid_res; -- 2.34.1