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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-38f9bab61desm619516a91.13.2026.07.30.01.07.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Jul 2026 01:07:52 -0700 (PDT) From: Songwei Chai To: andersson@kernel.org, alexander.shishkin@linux.intel.com, mike.leach@linaro.org, konrad.dybcio@oss.qualcomm.com, suzuki.poulose@arm.com, james.clark@arm.com, krzk+dt@kernel.org, conor+dt@kernel.org Cc: Songwei Chai , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, Jie Gan Subject: [PATCH v16 7/7] qcom-tgu: Add reset node to initialize Date: Thu, 30 Jul 2026 01:07:04 -0700 Message-Id: <20260730080704.2903540-8-songwei.chai@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260730080704.2903540-1-songwei.chai@oss.qualcomm.com> References: <20260730080704.2903540-1-songwei.chai@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYwNzMwMDA1NiBTYWx0ZWRfXxlU8T4fv2CeW A/c4rnph+3x7HvLrUZg2RMjm+oCa8jO6p6BN5y2QqFKhc0qHKIk2ueoywUDhKgDLpdn5jOfSg4c UtGUspGeMi7r3QVEC7E8jqmFuJtI53w= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzMwMDA1NiBTYWx0ZWRfX2St1gxebevZE AYaDxQBXABuAXRFNyYe6o0JkNYKeT36ZGP6BEnbFqq8lFLerR1hSpK0U5uMv6knsKMyiV1ygQ+/ BU1lLXlyvSnjYPjhF0vnEQX/Ne/HXLaMcNPfQFTVVHfPKH0nO89WLRaik4xB57JRsYybvDLhppG gVDiNlHl5B8oe/vVvBrKwAj2i6v5+XmwD4Eo9XxQ6+sTY8S5lwF6xXGvlMMzHb5MzKzTr/Elng/ woM8cR1mPeD7RQT/GMXjRe7KfcbKFM25w5udvQhrmeZPw7b4GWsjKDk7bywx47Ie0J34UN91eSx u0qvbNpADhlsmlgXiZ0acKMrPSt/5X5lPZx7c9UelmPGzE7IDDI71KVMiSgFNJD/vIHOJTIkuO6 J1x5Qaj3zRu1HoAO9brCNDdpmMxlq2z/DrGzauC3YklsSnqV1J29N0PYStIvZ70gbzXXJ6BNp0c nr7gLqVtyCZOugGlexA== X-Proofpoint-GUID: cLTJOc1VKKE-s7HCe816ZHuKDCzf1Yhy X-Proofpoint-ORIG-GUID: cLTJOc1VKKE-s7HCe816ZHuKDCzf1Yhy X-Authority-Analysis: v=2.4 cv=CMYamxrD c=1 sm=1 tr=0 ts=6a6b0659 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=79gz_PYK2aiFH5aRGwAA:9 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-30_02,2026-07-29_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 spamscore=0 impostorscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607300056 Add reset node to initialize the value of priority/condition_decode/condition_select/timer/counter nodes. Signed-off-by: Songwei Chai Reviewed-by: Jie Gan --- .../ABI/testing/sysfs-bus-amba-devices-tgu | 7 ++ drivers/hwtracing/qcom/tgu.c | 84 +++++++++++++++++++ 2 files changed, 91 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu index a0cad2f16310..5c928a5fa033 100644 --- a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu +++ b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu @@ -51,3 +51,10 @@ KernelVersion: 7.2 Contact: Jinlong Mao , Songwei Chai Description: (RW) Set/Get the counter value with specific step for TGU. + +What: /sys/bus/amba/devices//reset_tgu +Date: August 2026 +KernelVersion: 7.2 +Contact: Jinlong Mao , Songwei Chai +Description: + (Write) Write 1 to reset the dataset for TGU. diff --git a/drivers/hwtracing/qcom/tgu.c b/drivers/hwtracing/qcom/tgu.c index ea83273a628c..d65a68faa741 100644 --- a/drivers/hwtracing/qcom/tgu.c +++ b/drivers/hwtracing/qcom/tgu.c @@ -228,6 +228,18 @@ static ssize_t tgu_write_all_hw_regs(struct tgu_drvdata *drvdata) int i, j, k, index = 0; TGU_UNLOCK(drvdata->base); + + /* + * Quiesce the detection engine before mutating any comparison input. + * This function is also reached from reset_tgu_store() while the TGU is + * already running (TGU_CONTROL == 1); rewriting the priority/condition/ + * timer/counter registers register-by-register on a live engine could + * feed a transient, half-updated match into CTI/interrupt consumers. + * Programming with CONTROL == 0 and only re-enabling at the end keeps the + * program-then-enable ordering for every caller. + */ + writel(0, drvdata->base + TGU_CONTROL); + for (i = 0; i < drvdata->num_step; i++) { for (j = 0; j < MAX_PRIORITY; j++) { for (k = 0; k < drvdata->num_reg; k++) { @@ -459,8 +471,80 @@ static ssize_t enable_tgu_store(struct device *dev, } static DEVICE_ATTR_RW(enable_tgu); +static ssize_t reset_tgu_store(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t size) +{ + struct tgu_drvdata *drvdata = dev_get_drvdata(dev); + struct value_table *vt = drvdata->value_table; + unsigned long value; + int i, j, ret; + + if (kstrtoul(buf, 0, &value) || value != 1) + return -EINVAL; + + /* + * Hold the mutex across the whole sequence so it cannot race with + * enable_tgu_store()/tgu_dataset_store(): the enabled check and the + * hardware access stay consistent. No PM reference is taken or dropped + * here - the shadow tables are plain memory, and the hardware is only + * touched when the device is already resumed via the enable reference. + */ + guard(mutex)(&drvdata->lock); + + if (vt->priority) { + size_t bytes = MAX_PRIORITY * drvdata->num_step * + drvdata->num_reg * sizeof(unsigned int); + memset(vt->priority, 0, bytes); + } + + if (vt->condition_decode) { + size_t bytes = drvdata->num_condition_decode * + drvdata->num_step * sizeof(unsigned int); + memset(vt->condition_decode, 0, bytes); + + /* Initialize all condition decode registers to NOT (0x1000000) */ + for (i = 0; i < drvdata->num_step; i++) + for (j = 0; j < drvdata->num_condition_decode; j++) + vt->condition_decode[calculate_array_location( + drvdata, i, TGU_CONDITION_DECODE, j)] = + TGU_CONDITION_DECODE_NOT; + } + + if (vt->condition_select) { + size_t bytes = drvdata->num_condition_select * + drvdata->num_step * sizeof(unsigned int); + memset(vt->condition_select, 0, bytes); + } + + if (vt->timer) { + size_t bytes = drvdata->num_step * drvdata->num_timer * + sizeof(unsigned int); + memset(vt->timer, 0, bytes); + } + + if (vt->counter) { + size_t bytes = drvdata->num_step * drvdata->num_counter * + sizeof(unsigned int); + memset(vt->counter, 0, bytes); + } + + /* If the TGU is running, apply the cleared configuration immediately. */ + if (drvdata->enabled) { + ret = tgu_write_all_hw_regs(drvdata); + if (ret) + return ret; + } + + dev_dbg(dev, "Qualcomm-TGU reset complete\n"); + + return size; +} +static DEVICE_ATTR_WO(reset_tgu); + static struct attribute *tgu_common_attrs[] = { &dev_attr_enable_tgu.attr, + &dev_attr_reset_tgu.attr, NULL, }; -- 2.34.1