From: "BillXiang" <xiangwencheng@lanxincomputing.com>
To: <anup@brainfault.org>
Cc: <atish.patra@linux.dev>, <pjw@kernel.org>, <palmer@dabbelt.com>,
<aou@eecs.berkeley.edu>, <alex@ghiti.fr>, <kvm@vger.kernel.org>,
<kvm-riscv@lists.infradead.org>,
<linux-riscv@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<xiangwencheng@lanxincomputing.com>
Subject: [PATCH] riscv: KVM: Add hart-to-vCPU mapping for faster MSI injection
Date: Thu, 30 Jul 2026 17:36:14 +0800 [thread overview]
Message-ID: <20260730093614.983508-1-xiangwencheng@lanxincomputing.com> (raw)
Replace linear searches over all vCPUs in MSI injection paths with a
direct hart_index -> vCPU lookup table. This avoids O(n) scans on
every injected interrupt and improves performance when the number of
vCPUs is large.
Both kvm_riscv_aia_inject_msi_by_id() and kvm_riscv_aia_inject_msi()
now use the table instead of iterating over the vCPU list.
Signed-off-by: BillXiang <xiangwencheng@lanxincomputing.com>
---
arch/riscv/include/asm/kvm_aia.h | 2 +
arch/riscv/kvm/aia_device.c | 67 +++++++++++++++++++++-----------
2 files changed, 47 insertions(+), 22 deletions(-)
diff --git a/arch/riscv/include/asm/kvm_aia.h b/arch/riscv/include/asm/kvm_aia.h
index c67ec5ac0..71240b0a2 100644
--- a/arch/riscv/include/asm/kvm_aia.h
+++ b/arch/riscv/include/asm/kvm_aia.h
@@ -47,6 +47,8 @@ struct kvm_aia {
/* Internal state of APLIC */
void *aplic_state;
+
+ struct kvm_vcpu **hart_to_vcpu;
};
struct kvm_vcpu_aia_csr {
diff --git a/arch/riscv/kvm/aia_device.c b/arch/riscv/kvm/aia_device.c
index be83c2d5f..595553817 100644
--- a/arch/riscv/kvm/aia_device.c
+++ b/arch/riscv/kvm/aia_device.c
@@ -253,6 +253,14 @@ static int aia_init(struct kvm *kvm)
if (ret)
return ret;
+ aia->hart_to_vcpu = kcalloc(kvm->created_vcpus,
+ sizeof(struct kvm_vcpu*),
+ GFP_KERNEL);
+ if (!aia->hart_to_vcpu) {
+ ret = -ENOMEM;
+ goto fail_cleanup_aplic;
+ }
+
/* Iterate over each VCPU */
kvm_for_each_vcpu(idx, vcpu, kvm) {
vaia = &vcpu->arch.aia_context;
@@ -274,6 +282,12 @@ static int aia_init(struct kvm *kvm)
/* Update HART index of the IMSIC based on IMSIC base */
vaia->hart_index = aia_imsic_hart_index(aia,
vaia->imsic_addr);
+
+ if (aia->hart_to_vcpu[vaia->hart_index]) {
+ ret = -EINVAL;
+ goto fail_cleanup_imsics;
+ }
+ aia->hart_to_vcpu[vaia->hart_index] = vcpu;
/* Initialize IMSIC for this VCPU */
ret = kvm_riscv_vcpu_aia_imsic_init(vcpu);
@@ -293,6 +307,9 @@ static int aia_init(struct kvm *kvm)
continue;
kvm_riscv_vcpu_aia_imsic_cleanup(vcpu);
}
+ kfree(aia->hart_to_vcpu);
+ aia->hart_to_vcpu = NULL;
+fail_cleanup_aplic:
kvm_riscv_aia_aplic_cleanup(kvm);
return ret;
}
@@ -551,30 +568,28 @@ void kvm_riscv_vcpu_aia_deinit(struct kvm_vcpu *vcpu)
int kvm_riscv_aia_inject_msi_by_id(struct kvm *kvm, u32 hart_index,
u32 guest_index, u32 iid)
{
- unsigned long idx;
struct kvm_vcpu *vcpu;
+ struct kvm_aia *aia = &kvm->arch.aia;
/* Proceed only if AIA was initialized successfully */
if (!kvm_riscv_aia_initialized(kvm))
return -EBUSY;
- /* Inject MSI to matching VCPU */
- kvm_for_each_vcpu(idx, vcpu, kvm) {
- if (vcpu->arch.aia_context.hart_index == hart_index)
- return kvm_riscv_vcpu_aia_imsic_inject(vcpu,
- guest_index,
- 0, iid);
- }
+ if (!aia->hart_to_vcpu || hart_index >= kvm->created_vcpus)
+ return 0;
- return 0;
+ vcpu = aia->hart_to_vcpu[hart_index];
+ if (!vcpu)
+ return 0;
+
+ return kvm_riscv_vcpu_aia_imsic_inject(vcpu, guest_index, 0, iid);
}
int kvm_riscv_aia_inject_msi(struct kvm *kvm, struct kvm_msi *msi)
{
gpa_t tppn, ippn;
- unsigned long idx;
struct kvm_vcpu *vcpu;
- u32 g, toff, iid = msi->data;
+ u32 g, toff, iid = msi->data, hart_index;
struct kvm_aia *aia = &kvm->arch.aia;
gpa_t target = (((gpa_t)msi->address_hi) << 32) | msi->address_lo;
@@ -589,18 +604,22 @@ int kvm_riscv_aia_inject_msi(struct kvm *kvm, struct kvm_msi *msi)
g = tppn & (BIT(aia->nr_guest_bits) - 1);
tppn &= ~((gpa_t)(BIT(aia->nr_guest_bits) - 1));
- /* Inject MSI to matching VCPU */
- kvm_for_each_vcpu(idx, vcpu, kvm) {
- ippn = vcpu->arch.aia_context.imsic_addr >>
- IMSIC_MMIO_PAGE_SHIFT;
- if (ippn == tppn) {
- toff = target & (IMSIC_MMIO_PAGE_SZ - 1);
- return kvm_riscv_vcpu_aia_imsic_inject(vcpu, g,
- toff, iid);
- }
- }
+ if (!aia->hart_to_vcpu)
+ return 0;
- return 0;
+ hart_index = aia_imsic_hart_index(aia, target);
+ if(hart_index >= kvm->created_vcpus)
+ return 0;
+
+ vcpu = aia->hart_to_vcpu[hart_index];
+ if (!vcpu)
+ return 0;
+
+ ippn = vcpu->arch.aia_context.imsic_addr >> IMSIC_MMIO_PAGE_SHIFT;
+ if (ippn != tppn)
+ return 0;
+ toff = target & (IMSIC_MMIO_PAGE_SZ - 1);
+ return kvm_riscv_vcpu_aia_imsic_inject(vcpu, g, toff, iid);
}
int kvm_riscv_aia_inject_irq(struct kvm *kvm, unsigned int irq, bool level)
@@ -641,10 +660,14 @@ void kvm_riscv_aia_init_vm(struct kvm *kvm)
void kvm_riscv_aia_destroy_vm(struct kvm *kvm)
{
+ struct kvm_aia *aia = &kvm->arch.aia;
/* Proceed only if AIA was initialized successfully */
if (!kvm_riscv_aia_initialized(kvm))
return;
+ kfree(aia->hart_to_vcpu);
+ aia->hart_to_vcpu = NULL;
+
/* Cleanup APLIC context */
kvm_riscv_aia_aplic_cleanup(kvm);
}
--
2.53.0
next reply other threads:[~2026-07-30 9:36 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-30 9:36 BillXiang [this message]
2026-10-02 6:53 ` Anup Patel
2026-10-08 6:41 ` BillXiang
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