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client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by DS1PEPF00017090.mail.protection.outlook.com (10.167.17.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.292.8 via Frontend Transport; Thu, 30 Jul 2026 19:48:46 +0000 Received: from yaz-khff4.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.41; Thu, 30 Jul 2026 14:48:45 -0500 From: Yazen Ghannam To: , CC: , Avadhut Naik Subject: [PATCH v9 0/7] Incorporate DRAM address in EDAC messages Date: Thu, 30 Jul 2026 15:48:27 -0400 Message-ID: <20260730194834.3203601-1-yazen.ghannam@amd.com> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF00017090:EE_|DS0PR12MB9276:EE_ X-MS-Office365-Filtering-Correlation-Id: b1bbcf54-bbfb-48c8-8f84-08deee7391c3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700016|1800799024|23010399003|82310400026|18002099003|10067099003|5023799004|11063799006|56012099006|3023799007|13003099007; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ywK6yVDG+hWrfUmz92yZUVOISA/02JHzZfq8GSUFiDbEcXwniwaUdRPygwoehachZ2v0Lobtjk2OGY6pbaIQkZIoZemwIbyo42AHXPpe48HEWtQr4eZvJBTcrhe8d9H/Rc+6uvLYENg9YDGlJyYlyRuhEu1EJRPWmKwsS3YuLuo1DG6nB8clyS2pxLwRD9ZS7AFH/zONDG+bcAO/mMUwi/9/ryKRPA6g2q0XyWxlQNkXYAqt9wJ7vaX7FTFTKqpASSshxqC+dS+Z3LEezuSoFtb2MaDYFbaCMcIZim8C7hWwTStuLpok+Yn1x8y2ZUpkKZuA+0SnXvhUwYmkNwsoPqL+WwawIUCSSAfZZtZN7uLGE3CeySVmtltfR8e5sg+LVd01ItZQnHt0HkzQ5Tq7RF09qAzihb+ZlV8EYFUfArHxw74X3l129ktWXy73D4U4 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Jul 2026 19:48:46.6718 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b1bbcf54-bbfb-48c8-8f84-08deee7391c3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF00017090.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB9276 Hi all, This revision addresses the Sashiko comments, and also includes some other minor fixups. Thanks, Yazen Cc: Avadhut Naik Link: https://lore.kernel.org/20260727212045.1810480-1-yazen.ghannam@amd.com Changes in v9: - Treat -EOPNOTSUPP like -ENODEV when PRM support is not built. (Sashiko) - Document why the PRM handlers do not need the MI300 address conversion. (Sashiko) - Clear the completed-operations bits in the translation entry points rather than at each call site. - Narrow the operation bitmaps to u8. - Note that struct atl_dram_addr mirrors the PRM output buffer. - Widen the subject prefix of patch 4 to cover the EDAC changes. - Reorder variable declarations and reword commit messages. Changes in v8: - Drop "Directly export address translation helper". - Merge the two PRM translation helpers into one. (Boris) - Build the PRM support unconditionally and drop CONFIG_AMD_ATL_PRM. - Formatting and other small changes. Changes in v7: - Drop fake_inject patch that was already accepted. - Remove function pointers. (Boris). Changes in v6: - Remove fake_inject interface. (Boris) - Add two more values to 'other_detail'. Changes in v5: - Address a comment from Sashiko in patch 2. Changes in v4: - Drop a "handler available" check in patch 1. - Reword commit message in patch 2. - Reformat string in patch 2. Avadhut Naik (2): RAS/AMD/ATL: Add DRAM address translation via PRM EDAC/amd64: Include DRAM address in output Yazen Ghannam (5): RAS/AMD/ATL: Always build PRM address translation support RAS/AMD/ATL: Refactor PRM address translation into a common helper RAS/AMD/ATL: Add unified UMC address translation interface RAS/AMD, EDAC/amd64: Use unified interface for SPA translation RAS/AMD/ATL: Remove the standalone SPA translation interface drivers/edac/amd64_edac.c | 38 ++++++++++++++++------ drivers/edac/amd64_edac.h | 2 ++ drivers/ras/amd/atl/Kconfig | 4 --- drivers/ras/amd/atl/Makefile | 3 +- drivers/ras/amd/atl/core.c | 4 +-- drivers/ras/amd/atl/internal.h | 13 ++------ drivers/ras/amd/atl/prm.c | 32 +++++++------------ drivers/ras/amd/atl/system.c | 4 +++ drivers/ras/amd/atl/umc.c | 58 ++++++++++++++++++++++++++++------ drivers/ras/amd/fmpm.c | 10 +++--- drivers/ras/ras.c | 31 +++++++++--------- include/linux/ras.h | 46 +++++++++++++++++++++++---- 12 files changed, 160 insertions(+), 85 deletions(-) base-commit: 4020f22dccb18f04ace6c8481dddc01603d21173 -- 2.53.0