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Fri, 31 Jul 2026 01:54:38 -0700 (PDT) X-Received: by 2002:a05:622a:1a90:b0:517:8470:2d2d with SMTP id d75a77b69052e-52b4b053a9amr13980711cf.29.1785488078125; Fri, 31 Jul 2026 01:54:38 -0700 (PDT) Received: from QCOM-eG0v1AUPpu.na.qualcomm.com ([2a01:e0a:830:450:61cd:dcd3:c61a:ac3c]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c1fd44e9f0bsm61899366b.43.2026.07.31.01.54.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Jul 2026 01:54:37 -0700 (PDT) From: Loic Poulain Date: Fri, 31 Jul 2026 10:54:34 +0200 Subject: [PATCH v4 1/4] media: qcom: camss: Add PM clock support and integrate with runtime PM Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260731-camss-version-v4-1-be8b716a8c4d@oss.qualcomm.com> References: <20260731-camss-version-v4-0-be8b716a8c4d@oss.qualcomm.com> In-Reply-To: <20260731-camss-version-v4-0-be8b716a8c4d@oss.qualcomm.com> To: Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Loic Poulain , Frank Li X-Mailer: b4 0.14.2 X-Proofpoint-GUID: YmTYBXkRVk7pNo36LrigJ6Z5pjrIObIV X-Authority-Analysis: v=2.4 cv=SK5ykuvH c=1 sm=1 tr=0 ts=6a6c62cf cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=KKAkSRfTAAAA:8 a=8AirrxEcAAAA:8 a=EUspDBNiAAAA:8 a=KmNvnciZBadtvzOit0AA:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 a=cvBusfyB2V15izCimMoJ:22 a=ST-jHhOKWsTCqRlWije3:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzMxMDA2MyBTYWx0ZWRfX76piLIk+M2uR mZzZehWNxU84qXlL6XEWA8/np8k1VmNgdJpJbgD1U3jc723Nn83LRfK5YtRAaI2QfOE16ruEL/x qu/feJGTLYP0iN2mEtlltzHUDeBOrOG5GG5xblQMloCGht3Lwfzon95T256R7E4sWhEFKwYeFE1 +slvgK/5lfVUNFOp5h/tOBJELssOt3U8gctCKSpKJbq4TvYnyhQrkmJweJT441yAQbMB7FAvv9p TlJ64m7SNeDN1nEOTo1vd9IG4f6tLoVbPMztOmst+ck/atN+GWttDLtc+NXC2eYuyRBjvTSSUnm vVPaVuKmxb6+OiDZk2y9tlJmDdZSCo4c1e+zbTKAdZ88xQGb38dhrHFP4Cc9NhBQF0kz+5p838m mmlcJcz0gn6TKYghbYuqt/JjUUgSEjOtxI1jFw/0BJQj3OR8EuER6VS2MTK9FaDlL3FXu254yG7 m6cap5E1TJW67Q0cf/g== X-Proofpoint-ORIG-GUID: YmTYBXkRVk7pNo36LrigJ6Z5pjrIObIV X-Proofpoint-Spam-Info: AW1haW4tMjYwNzMxMDA2MyBTYWx0ZWRfX8Uq2ckIWJlqT uvOkjmxO+rqgG2lUfhuaoS/aGwoplpuvb2t6c5ibogtC6HsfjS2NqsqWxTbv+fDJt4CggWnxx4R 0dLOWj5IT4fbdBPZYWV9hYr+josk8Ck= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-31_03,2026-07-30_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 spamscore=0 impostorscore=0 malwarescore=0 phishscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607310063 Add optional PM clock support to the CAMSS driver using the PM clock framework. This allows CAMSS clocks to be registered once and automatically managed during runtime suspend and resume. This is especially useful for global CAMSS clocks that are shared across multiple CAMSS subblocks. This avoids the need for each subblock to reference and manage the shared clocks individually. A typical example is the set of clocks in the top_group, which may be used by CSID, PHY, CCI, and other CAMSS blocks. Introduce a small PM clock descriptor table in the CAMSS resources structure to describe clocks and their optional rates. Initialize these clocks at probe time and delegate clock ownership to the PM core. Hook PM clock handling into the runtime PM callbacks to ensure clocks are properly suspended and resumed alongside power domains and ICC paths. Reviewed-by: Bryan O'Donoghue Reviewed-by: Frank Li Signed-off-by: Loic Poulain --- drivers/media/platform/qcom/camss/camss.c | 49 +++++++++++++++++++++++++++++++ drivers/media/platform/qcom/camss/camss.h | 1 + 2 files changed, 50 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 2123f6388e3d7eafe669efd6b033e22d8eb5cf79..b541071e97fe02f38aebda1d9b096b930d1cfde5 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include @@ -5346,6 +5347,40 @@ static void camss_genpd_cleanup(struct camss *camss) dev_pm_domain_detach(camss->genpd, true); } +/* + * camss_init_pm_clks - set up shared CAMSS clocks + * + * Clocks listed in res->pm_clks are shared across all CAMSS sub-devices + * (e.g. top_ahb, axi). + */ +static int camss_init_pm_clks(struct camss *camss) +{ + struct device *dev = camss->dev; + unsigned int i; + int ret; + + if (!camss->res->pm_clks[0]) + return 0; + + if (IS_ENABLED(CONFIG_PM_CLK)) { + ret = devm_pm_clk_create(dev); + if (ret) + return ret; + } + + for (i = 0; i < CAMSS_RES_MAX && camss->res->pm_clks[i]; i++) { + if (IS_ENABLED(CONFIG_PM_CLK)) + ret = pm_clk_add(dev, camss->res->pm_clks[i]); + else + ret = PTR_ERR_OR_ZERO(devm_clk_get_enabled(dev, camss->res->pm_clks[i])); + if (ret) + return dev_err_probe(dev, ret, "failed to set up pm clock %s\n", + camss->res->pm_clks[i]); + } + + return 0; +} + /* * camss_probe - Probe CAMSS platform device * @pdev: Pointer to CAMSS platform device @@ -5434,6 +5469,10 @@ static int camss_probe(struct platform_device *pdev) pm_runtime_enable(dev); + ret = camss_init_pm_clks(camss); + if (ret) + goto err_v4l2_device_unregister; + ret = camss_parse_ports(camss); if (ret < 0) goto err_v4l2_device_unregister; @@ -5775,7 +5814,11 @@ static int __maybe_unused camss_runtime_suspend(struct device *dev) return ret; } +#if IS_ENABLED(CONFIG_PM_CLK) + return pm_clk_suspend(dev); +#else return 0; +#endif } static int __maybe_unused camss_runtime_resume(struct device *dev) @@ -5785,6 +5828,12 @@ static int __maybe_unused camss_runtime_resume(struct device *dev) int i; int ret; +#if IS_ENABLED(CONFIG_PM_CLK) + ret = pm_clk_resume(dev); + if (ret) + return ret; +#endif + for (i = 0; i < camss->res->icc_path_num; i++) { ret = icc_set_bw(camss->icc_path[i], icc_res[i].icc_bw_tbl.avg, diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h index 93d691c8ac63b2a47dbb234856b627d8911a1851..fe5fe25d5f18d8a3ce35b48077a975f1453c341f 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -107,6 +107,7 @@ enum icc_count { struct camss_resources { enum camss_version version; const char *pd_name; + const char *pm_clks[CAMSS_RES_MAX]; const struct camss_subdev_resources *csiphy_res; const struct camss_subdev_resources *tpg_res; const struct camss_subdev_resources *csid_res; -- 2.34.1