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[2001:4c4e:1b8b:8b00:5388:1a2c:61ca:978d]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-47fd41d1756sm1416029f8f.4.2026.07.30.23.57.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Jul 2026 23:58:00 -0700 (PDT) From: Igor Paunovic To: Jiaxing Hu Cc: Tomeu Vizoso , Heiko Stuebner , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Igor Paunovic Subject: Re: [PATCH 2/2] accel/rocket: keep core slots stable across unbind and rebind Date: Fri, 31 Jul 2026 08:57:44 +0200 Message-ID: <20260731065744.12961-1-royalnet026@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260730113256.1418091-1-gahing@gahingwoo.com> References: <20260730113256.1418091-1-gahing@gahingwoo.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Hi Jiaxing, Thanks - that is exactly the kind of hole a reviewer is for. You were right on all three counts: the failure path left the slot marked live, and the live-slot walk in rocket_job_open() could then write one entry past its allocation. v2 is out with all three addressed: https://lore.kernel.org/dri-devel/20260731064933.12548-1-royalnet026@gmail.com/ I also exercised the path you described on RK3588 - a forced error return in rocket_core_init() for core 2 with cores 0 and 1 bound: the slot is released, the device comes up with the two remaining cores, and inference passes bit-exact with only the two live cores' interrupts firing. Thanks again for the careful review, Igor