From: Yao Zi <me@ziyao.cc>
To: Thomas Gleixner <tglx@kernel.org>, Ingo Molnar <mingo@redhat.com>,
Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
"H. Peter Anvin" <hpa@zytor.com>,
Randy Dunlap <rdunlap@infradead.org>,
"Peter Zijlstra (Intel)" <peterz@infradead.org>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
Yao Zi <me@ziyao.cc>,
stable@vger.kernel.org
Subject: [PATCH] x86/locking: Use sfence for wmb() if SSE is available
Date: Sat, 1 Aug 2026 18:29:53 +0000 [thread overview]
Message-ID: <20260801182953.15069-1-me@ziyao.cc> (raw)
When adding cc clobber to wmb()'s definition, the alternative()
condition to use sfence was incorrectly raised from X86_FEATURE_XMM to
X86_FEATURE_XMM2.
Restore the correct constraint for potential better performance on
machines without SSE2.
Fixes: bd922477d935 ("locking/x86: Add cc clobber for ADDL")
Signed-off-by: Yao Zi <me@ziyao.cc>
Cc: stable@vger.kernel.org
---
arch/x86/include/asm/barrier.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h
index b0096b5645a9..e0e59da15748 100644
--- a/arch/x86/include/asm/barrier.h
+++ b/arch/x86/include/asm/barrier.h
@@ -17,7 +17,7 @@
#define rmb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "lfence", \
X86_FEATURE_XMM2) ::: "memory", "cc")
#define wmb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "sfence", \
- X86_FEATURE_XMM2) ::: "memory", "cc")
+ X86_FEATURE_XMM) ::: "memory", "cc")
#else
#define __mb() asm volatile("mfence":::"memory")
#define __rmb() asm volatile("lfence":::"memory")
--
2.54.0
next reply other threads:[~2026-08-01 18:30 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-01 18:29 Yao Zi [this message]
2026-08-03 6:22 ` Peter Zijlstra
2026-08-07 20:08 ` [tip: x86/core] " tip-bot2 for Yao Zi
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