From: Chen Pei <cp0613@linux.alibaba.com>
To: Himanshu Chauhan <himanshu.chauhan@oss.qualcomm.com>,
linux-riscv@lists.infradead.org
Cc: qingfang.deng@linux.dev, alex@ghiti.fr, aou@eecs.berkeley.edu,
palmer@dabbelt.com, pjw@kernel.org, shuah@kernel.org,
linux-kernel@vger.kernel.org, thecharlesjenkins@gmail.com,
jtaubepe@redhat.com
Subject: Re: [PATCH v6 3/5] riscv: ptrace support for hardware break/watchpoints
Date: Wed, 5 Aug 2026 21:22:52 +0800 [thread overview]
Message-ID: <20260805132256.918-1-cp0613@linux.alibaba.com> (raw)
In-Reply-To: <20260803134913.2013674-4-himanshu.chauhan@oss.qualcomm.com>
> +struct __riscv_hwdebug_state {
> + unsigned long addr;
> + unsigned long type;
> + unsigned long len;
> + unsigned long ctrl;
> +} __packed;
Hi Himanshu,
Two suggestions about the new UAPI structure added in this patch.
1) Consider __u64 instead of 'unsigned long': its size differs
between rv32 and rv64, so the layout would not be stable across
32-bit and 64-bit userspace (e.g. a future COMPAT path). __u64
keeps the layout identical for both.
2) With all members the same width there is no interior padding, so
__packed can be dropped.
The struct user_hwdebug_state above already uses fixed-width types;
defining this one the same way would be consistent.
Best regards,
Pei
--
Chen Pei <cp0613@linux.alibaba.com>
next prev parent reply other threads:[~2026-08-05 13:23 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-03 13:49 [PATCH v6 0/5] riscv: Introduce " Himanshu Chauhan
2026-08-03 13:49 ` [PATCH v6 1/5] " Himanshu Chauhan
2026-08-05 13:20 ` Chen Pei
2026-08-03 13:49 ` [PATCH v6 2/5] riscv: Add breakpoint and watchpoint test for riscv Himanshu Chauhan
2026-08-03 13:49 ` [PATCH v6 3/5] riscv: ptrace support for hardware break/watchpoints Himanshu Chauhan
2026-08-05 13:22 ` Chen Pei [this message]
2026-08-03 13:49 ` [PATCH v6 4/5] selftests/breakpoints: extend riscv test for ptrace hw break/watchpoints Himanshu Chauhan
2026-08-03 13:49 ` [PATCH v6 5/5] MAINTAINERS: Add entry for RISC-V Debugging Himanshu Chauhan
2026-08-04 17:10 ` [PATCH v6 0/5] riscv: Introduce support for hardware break/watchpoints Jesse Taube
2026-08-07 8:00 ` Himanshu Chauhan
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