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[86.49.241.13]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c2080c90d21sm83079366b.39.2026.08.07.11.17.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Aug 2026 11:17:47 -0700 (PDT) From: Andrew Jones To: linux-riscv@lists.infradead.org, iommu@lists.linux.dev Cc: linux-kernel@vger.kernel.org, tomasz.jeznach@linux.dev, tjeznach@rivosinc.com, jgg@ziepe.ca, jgg@nvidia.com, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, pjw@kernel.org, palmer@dabbelt.com, anup@brainfault.org, tglx@kernel.org, kevin.tian@intel.com, fangyu.yu@linux.alibaba.com, Nutty Liu Subject: [PATCH v3 15/19] iommu/riscv: report iommu capabilities Date: Fri, 7 Aug 2026 20:17:09 +0200 Message-ID: <20260807181713.228535-16-andrew.jones@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260807181713.228535-1-andrew.jones@oss.qualcomm.com> References: <20260807181713.228535-1-andrew.jones@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: aLmykn__9eFlDLC5M3TDXTjYCztmhc_w X-Proofpoint-Spam-Info: AW1haW4tMjYwODA3MDE0MyBTYWx0ZWRfX2p55FfNJAtTc MMyxepj9BwfYIdE0zyezEgbTCwHCsuo4N6waiSyFaUORvxCMv0s+KdAjrlL8G2vrcGAZQand0sc xV/V4iczUnujPHdsRuWipNxm2+p3868= X-Proofpoint-GUID: aLmykn__9eFlDLC5M3TDXTjYCztmhc_w X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODA3MDE0MyBTYWx0ZWRfX9qE5pWJju5E/ UMynmmz873nTpCVeesa5KA4eJn3Gdjnko9JFyGmbzMLc8tWWJt7Rbhm9H9E+XY3BuKWCU/YF5Sb uSF6v/SSaOZuVQPK9LON6D4y1hQv+nG7oP0E6FS6Po+xFUpbhEIbCpSObR2UI3W4HORZTLF8KJ3 K3tk1zjXRR8gF9+a22HGttig4Wn4nQofa8ZYh6und7cZD40vofqu9ww/FXeC1+m+eWKuQ4yKxJF AE08G0yI5MqoXvvBPPg6U6CbvWGJctAJl9Dwt90DwnQVvNSHft3ydxBN8yRjmLA2GyDOa1JAcfk 52OsUwxFtO6Pg0Yrwk28b6hrsonjmC5PYHVmecUzWESE8e2/SrbaoQnzJgGNoBCzNMAMsUdtwjJ ZFDOBxlsVAB1JPE6eWc7m14Pnw8RsICkMlBDG6wjb/zcZXlRQdSTKCJyl6gjb2YRlQvBk2iCf9B VPDPjUa7X5cmjOcHIbw== X-Authority-Analysis: v=2.4 cv=X71i7mTe c=1 sm=1 tr=0 ts=6a76214d cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=VPysOpcHbS0DNrM1Xqmyow==:17 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=h0uksLzaAAAA:8 a=EUspDBNiAAAA:8 a=69EAbJreAAAA:8 a=eWAdAM1PFmNr0JmOMJYA:9 a=dawVfQjAaf238kedN5IG:22 a=MSi_79tMYmZZG2gvAgS0:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-07_03,2026-08-07_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 spamscore=0 bulkscore=0 clxscore=1015 priorityscore=1501 adultscore=0 phishscore=0 impostorscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608070143 From: Tomasz Jeznach Report RISC-V IOMMU capability required by the VFIO subsystem to enable PCIe device assignment. Signed-off-by: Tomasz Jeznach Signed-off-by: Andrew Jones Reviewed-by: Nutty Liu --- drivers/iommu/riscv/iommu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c index f40db2cda417..a286f5a24c16 100644 --- a/drivers/iommu/riscv/iommu.c +++ b/drivers/iommu/riscv/iommu.c @@ -1424,6 +1424,17 @@ static struct iommu_group *riscv_iommu_device_group(struct device *dev) return generic_device_group(dev); } +static bool riscv_iommu_capable(struct device *dev, enum iommu_cap cap) +{ + switch (cap) { + case IOMMU_CAP_CACHE_COHERENCY: + /* The RISC-V IOMMU is always DMA cache coherent. */ + return true; + default: + return false; + } +} + static int riscv_iommu_of_xlate(struct device *dev, const struct of_phandle_args *args) { return iommu_fwspec_add_ids(dev, args->args, 1); @@ -1516,6 +1527,7 @@ static void riscv_iommu_get_resv_regions(struct device *dev, struct list_head *h static const struct iommu_ops riscv_iommu_ops = { .of_xlate = riscv_iommu_of_xlate, + .capable = riscv_iommu_capable, .identity_domain = &riscv_iommu_identity_domain, .blocked_domain = &riscv_iommu_blocking_domain, .release_domain = &riscv_iommu_blocking_domain, -- 2.43.0