From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-qv1-f48.google.com (mail-qv1-f48.google.com [209.85.219.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 097A639769B for ; Sat, 8 Aug 2026 17:13:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.219.48 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786209213; cv=none; b=Y+O9fdd9UCfoG2VxejyYKgkf9OxOb7ZdLJLOcfgxD0RnwYEySM7GayB8sSR5sbcF4TIltErfc7mgqqphSuwc51HnuJm+8/679Yc2PI2pElp9J8D3HEOcq8Fxx5eL9bTXs6Z128fwlUWhwcfD6Ublt945srm8x++6JVRVV6WaZEY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786209213; c=relaxed/simple; bh=/5WR1kuA9d0MD++CPjLuWZLfVM9V/6peYSG7Dopmysg=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=h44pjZwb+BZOmZOHGWljsKwjXx3kJvgzYtU3HRSS/bQ5hg4pl9poshYSsdAntHYYz0O7BgzGRRslsKIZCJ3CU2vVk2cb3eFylnHtSsqMWUEtWNQWPiJobKxi0L8iTh+NzdPYFAjG9iO4eLitf70a2NH3DQe7BIWSPrrLhVQw5+g= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=hu0qcbTF; arc=none smtp.client-ip=209.85.219.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="hu0qcbTF" Received: by mail-qv1-f48.google.com with SMTP id 6a1803df08f44-9030f8ea3b3so4437106d6.1 for ; Sat, 08 Aug 2026 10:13:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1786209211; x=1786814011; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to:content-type; bh=1zSCFYsJi/YGsDjjzu9hgHmFBCe9GvVmfnZf9x92NT8=; b=hu0qcbTF3TGOWA0ghtzfgD9neoVYviW4DPyPuv7z7P7kBUh26nrWw4nddZ0db2PhlL iDh9zP0K3liTzgeKymb+sj3d9qMjt6LKoNSB+/2lrF9A/zS2Cg5Y1n6c8+Mcxvk9CFQ9 euRjzs0gXEH5x4iSHSik9O8ynQnrHhnd//SgKCQRMS8aynk2wpo3AW8/v1K2grATTUz6 xJsECEmffkpoF1/0x/aJ56Dqpqb7JG3Eo3LoXb7IqkW1/igxWPihsQFqHuMYlbKDtGAI BOkzOZSNu42bsYGpB1YEbohybn5PsYGNKUxuyc26Y2RYJWxIWPwMp1cgF8FZl3rwJ85g rMSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1786209211; x=1786814011; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to:content-type; bh=1zSCFYsJi/YGsDjjzu9hgHmFBCe9GvVmfnZf9x92NT8=; b=jTSXsjBqCvd1SMfSzbMyzNTGharO6EwZCUdBpLMh3Ngjm2FwX0ulAWbUO3wmOD+RvB NrEANcG+iBGi0/bRiRFL5lHQQ9zY+rz5DqWTy+u5yBPtJF9gL5ZuRoD2RLVMVtnw6zGM wxW17E6x+YWeiOIolIavB2bxPfRTJ7f0bm6IC2fx4gWZS8FuVa6QOcfUltQGJR9+/4eN ezPJ1llwrCEk6G+IZJ/wYAHX3Ahtsseu7PgSrIvTIwDOXv2drrDmXK1iAcew0pMEjmj9 OWWo372nUJNQspEqWiz+YXN6kmWBQjjlQt5DQV9uIVh+W+5GJex9x2nb9kMYalhmrOlN LtKQ== X-Forwarded-Encrypted: i=1; AHgh+RrgjQ6MwnNccSWFrsIv1wWbyQxLe8Hy4j3GrBvx48h8jHUk+byncDtDAFjEGQqDrec35B+GQc3VY4rcZqs=@vger.kernel.org X-Gm-Message-State: AOJu0YzxjfMMBI8i1Jtvn113/VzwfHfBkViQNcKpvDJwigDSZMaUvfrA OKHBJNY/YvKz70ga4pdrMsjwMHl2IahpEGNoEaTS7BKYL1oZWO5plyfS X-Gm-Gg: AR+sD111mTN87dIwzeqlJ2RjBUPdSGc21XMvPpqh+IFJ9VB5EW+Z18xbEgCm5sTAngH Ck7upJSXCxsg1gTzkHlLe8by0Bx1ps9D0EbtcGU8mrnGCYES9WS2ChrjOH1bEH6WFuHw0AV0cPl VskG4l9+eUr8cIoSjxtRf16g3HATSYMZoT7P9ICxi2kpxmv7nswAQtsPQJr7ypexh5wWmMXXclH mJJHFwT2/c0iRnIhaglCHZfQHcak0QLjlUbhohJHZSNZRfNv4RHRJ79UDKN3yCjc2IgiISY8L2e 44InbQUngcTjr5k4EPvHO0Ye/xi/7mm4/9CROoUfJn01tF5091j1OFB36ypyO061Iup1GBHS4Yr SEDEjd1lCRXrfPogWduWNYorg5mpioB3/M3nnP5LAljVkztmGchhaBUVPoOWT/m/nHEBd3NHdAu jj5xU1jiLqE9CjKTXC5w242999PhEHoAdV/9lvc38ZUQ/zeAgpgBCNcEAkNb1cWTcY+/CxtrkcN vlobPbKvW8JRAI5xHwE2+D/Q6t1L6LnaMVy9DBpSaPmkwa2xkzZVG7n5NmqqbYtACrlr7do4Q== X-Received: by 2002:ad4:5ca9:0:b0:8ee:fbc5:8110 with SMTP id 6a1803df08f44-908813d33e8mr359375546d6.32.1786209210858; Sat, 08 Aug 2026 10:13:30 -0700 (PDT) Received: from JesseofTheNorth.internal ([2600:4041:502b:ea00::1408]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-908a93258cbsm34265286d6.33.2026.08.08.10.13.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Aug 2026 10:13:29 -0700 (PDT) From: Jesse Casco To: Rob Clark , Dmitry Baryshkov Cc: Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH] drm/msm/dp: skip PUSH_IDLE when the link was never enabled Date: Sat, 8 Aug 2026 13:13:25 -0400 Message-ID: <20260808171325.133041-1-jesse.casco@gmail.com> X-Mailer: git-send-email 2.55.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit msm_dp_display_atomic_enable() returns early when link training fails, leaving ->power_on false and the main link down. msm_dp_display_atomic_disable() nevertheless writes DP_STATE_CTRL_PUSH_IDLE and waits for an idle-pattern completion that cannot arrive, so every failed enable is followed by "PUSH_IDLE pattern timedout". Every other step of the teardown is already gated on that flag: msm_dp_display_disable(), called from .atomic_post_disable(), returns early on !power_on. The PUSH_IDLE write is the only one that is not, so the controller's runtime-PM reference is then dropped without the link having been taken down. On glymur (Snapdragon X2 Elite) the consequence is not a warning. The SoC does not survive it: TrustZone force-stops the SOCCP and ADSP remote processors and the machine resets silently about 50 ms later, with no oops and no panic. On an ASUS Zenbook A16 (UX3607OA), whose eDP panel does not currently train, this reproduces without any compositor or GPU involvement: # eDP enable has already failed with "Failed link training (rc=-104)" echo 1 > /sys/class/graphics/fb0/blank [535.645455] === marker === [535.694833] qcom_q6v5_pas d00000.remoteproc: fatal error received: \ sys_m_smsm.c:512:TZ force stop [535.694875] remoteproc remoteproc0: crash detected in soccp: type fatal error [535.728857] qcom_q6v5_pas 6800000.remoteproc: fatal error received: \ sys_m_smsm.c:783:err fatal notification received from TZ Gate the PUSH_IDLE write on ->power_on so the disable path is consistent with the rest of the teardown. With this applied the same sequence is harmless and the machine stays up; without it, it resets every time. The unconditional write dates back to the original DP driver (c943b4948b58 ("drm/msm/dp: add displayPort driver support")), but the surrounding code has been restructured several times since, so no Fixes: tag is offered. Note that the eDP link-training failure that exposes this on the A16 is a separate problem in the glymur eDP PHY and is reported separately; this change is about not damaging the machine when training fails, for whatever reason. Tested on ASUS Zenbook A16 (UX3607OA), Snapdragon X2 Elite Extreme, on linux-next next-20260803 and next-20260807. The machine has since been running next-20260807 with this patch as its daily driver. Assisted-by: Anthropic:Claude-Opus-5 Signed-off-by: Jesse Casco --- drivers/gpu/drm/msm/dp/dp_display.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index bc646d172..5d2ddf180 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -1458,6 +1458,20 @@ void msm_dp_display_atomic_disable(struct msm_dp *dp) msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); + /* + * If .atomic_enable() bailed out - link training failure is the common + * case - the mainlink was never brought up and ->power_on stayed false. + * Driving the PUSH_IDLE pattern into a controller that was never + * enabled times out, and .atomic_post_disable() then drops the + * controller's runtime-PM reference without tearing the PHY back down, + * because msm_dp_display_disable() returns early on !power_on. On + * glymur (Snapdragon X2 Elite) that combination is answered by a + * TrustZone-level SOCCP/ADSP force-stop and a silent SoC reset. + * There is nothing to push idle, so leave it alone. + */ + if (!dp->power_on) + return; + msm_dp_ctrl_push_idle(msm_dp_display->ctrl); } -- 2.55.0